Reset Wattman 2-3 times then restart, if that doesn’t work DDU the driver and reinstall. Its a weird driver issue that just happens sometimes when you are messing with memory timings.
That fixed it Thank you. Really had my head scratching.
I have a question, I have a Gigabyte RX570 with Samsung K4G41325FE-HC25 which are rated for 8gbps but my card runs at 1750Mhz instead of 2000Mhz and when I try to run them at 2000Mhz they run fine for sometime and then whole computer crashes. What exactly is holding it back thats confusing me so much.
I have attached the bios that I am currently running. I have only modified 1900 Strap 1750 and 2000 are original it is stable at 1900Mhz memory clock please take a look
Gigabyte_RX570_1900.zip (110 KB)
Changing the VDDCI will help but how do I do the card has uP9505P. Is the procedure same as in Guide?
@wildcard Samsung memory really doesn’t OC well on Polaris, Hynix or Micron is what you want. That 2000MHz strap doesn’t look like a stock strap either looks like some shitty auto optimised PBE timings. I don’t have much time atm with requests spewing out my eyeballs for Polaris and mainboard firmware mods along with writing articles and reviews I think the only way I’m going to fit all this in is to start something donation based for Polaris mods as well otherwise I don’t think I’m even going to have time to sleep 
Hi! I’m working on app for rebuilding modules in vbios. And early method working fine. But I stuck with vbios signature verification. I compare all modules of four vbioses and find out that PowerPlayInfo includes some different two bytes 3125, 3025, 4626, 6326… etc… so possibly they are signatures.
[img]
[/img]
Then i tried to understand Vbios header, and that is what i made:
So vbios has two checksums:
CRC-8 for check spi rom for faulty. If this value is Ok - then Gpu core will load firmware
CRC-32 is based in PCI config, and probably checking data and command tables for checksum ok.
Also i compared this value with 4 gpus
If you know the location of signature in vbios or driver, or how to bypass this on linux-windows, it could be very useful, thanks!
@bigguygeo as far as I am aware Polaris vBIOSes do not have signatures but the driver does do some kind of check for all Polaris cards (except RX580) where if it finds a modified vBIOS the driver will install but not load. Cleanest solution to that problem is to just make the driver think you have an RX580, the other method is to use a software hack that’ll allow the driver to load regardless bypassing the check. I have no idea why AMD put the check into the driver but left out the RX580 in that check, considering Polaris is only any good once you’ve optimised the GPU frequency to voltage curve and fixed the god awful memory timings it was obviously in AMDs best interest to not add a driver level check at all.
I read some forums research, and before pixelclock patch released (possibly Windows registers patch for bios signature verification), users modded driver by reverse engineering to patch return success from verification stack. So I think amd using crc repository for vbios verification. My suggestion is that: scenario is simply compare. Driver read vbios, generating custom checksum to vbios, reading crc repository and then compare generated crc register with checksum repository and return success, jump not equal to other stack.
So if somebody could reverse checksum generation method, than we can fix by patching one reserved for future data or command module and other info type part of vbios, so it will return success to driver and that’s all.
I wouldn’t know on that front @biguygeo you’d need to ask someone who has messed around with the AMD Windows driver but finding someone that has will be difficult nobody wants to touch AMDs Windows driver because from all reports I’ve seen that driver is a total clusterfuck.
I believe you. But I think that somebody will get it useful. Many users have successfully modded 5xx with simple decimal sum fix of unused bytes. Someone even succeeds with 5700 xt modding. This crc checksum verification applies only on file size of vrom (65 kbs) other modules like gop and gop table resource are away from crc check.
I found this:
///////////////////////////////////////////////////////
This FFFFF padding outside of the file is used to fill unexpected end of file and nothing more. Still can’t understand how file size equals hexfile length
Ok, FILE SIZE?
73E9 = E973 = E600
74E9 = E974 = E800
76E9 = E976 = EC00
78E9 = E978 = F000
79E9 = E979 = F200
7FE9 = E97F = FE00
80E9 = E980 = 10000
Still can’t understand how this is working, but maybe its sort of EFI image rules of file size
///////////////////////////////////////////////////////
So checksum check is limited by this value size. This value is simply after 55AA at the beginning of the vrom
I haven’t looked at the state of RDNA modding a whole lot, I know its got some people working on it but anything like vBIOS mod tools are a way off still from what I’ve seen. If you have any useful links for 5700XT modding then I’ll take a look at those to check in again on how its going.
For some reason I can’t post links
So simply add www
mineshop.eu/2020/10/03/secret-sauce-bios-mod-for-rx-5700-graphic-cards/
igorslab.de/en/red-bios-editor-and-morepowertool-adjust-and-optimize-your-vbios-and-even-more-stable-overclocking-navi-unlimited/
techpowerup.com/review/flashing-amd-radeon-rx-5700-with-xt-bios-performance-guide/
Can someone help me remember how to change the VDDC offset in hex? Thanks
I want to set 1.250v from 1.100v
https://www.mediafire.com/file/5j285ph64…-strap.rom/file
Nevermind I got it. If anyone wants a 1.250v VDDC Sapphire Pulse RX 560 2GB BIOS lmk. I can clock my Gigabyte RX 560 4GB to 1480mhz on 1.250v btw.
Hey!
During a research, I’ve made a modification to a PolarisBiosEditor. The modification is called “PolarisBiosEditor-xml”.
I’m not sure if I’m going to develop it further, but it is open source and I hope it maybe useful not only for me.
Dumping into XML-based stdout is done for more data that is not visible in a GUI.
About video outputs, i2c buses, VDDCI-related, generic option ROM headers.
The main intended usage is helping editing and interpreting data opened in external hex editor.
To connect with an external hex editor dumped structures are associated with their HEX offset from the start of VBIOS file.
So to edit some value just go to the shown offset in external hex editor, change it, then open file in PolarisBiosEditor-xml and check that the correct value in the XML dump is changed. Save VBIOS with the editor to fix checksum.
Spoiler: Example output, near 500 lines, and skept to fit in forum post limit
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
<root-of-option-rom-dump name="bioses/Asus.RX580.8192.170417_1-stock.rom" dump-software-version="PolarisBiosEditor-1.7xml-2021.07">
<OptionRomAndAtomHeaders>
<EFI_LEGACY_EXPANSION_AMD_ROM_HEADER addr="0x0-0x4A len=74=0x4A">
<Signature55>85 = 0x55 = 0b1010101</Signature55>
<SignatureAA>170 = 0xAA = 0b10101010</SignatureAA>
<Bit8Length_in_512bytes>116 = 0x74 = 0b1110100</Bit8Length_in_512bytes>
<JmpRel16_OpCode_E9>233 = 0xE9 = 0b11101001</JmpRel16_OpCode_E9>
<Jmp_Target_Rel_To_0x6>685 = 0x2AD = 0b1010101101</Jmp_Target_Rel_To_0x6>
<reserved_legacy>18-bytes text:\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0</reserved_legacy>
<PCIRHeaderOffset>592 = 0x250 = 0b1001010000</PCIRHeaderOffset>
<PnPHeaderOffset>0</PnPHeaderOffset>
<TextsAfterHeaderNullPadding>0</TextsAfterHeaderNullPadding>
<TextIBM>3-bytes text:IBM</TextIBM>
<SimpleChecksum8ToZeroOverRegion_BeforeNextHeader>134 = 0x86 = 0b10000110</SimpleChecksum8ToZeroOverRegion_BeforeNextHeader>
<Unknown2_1>37508 = 0x9284 = 0b1001001010000100</Unknown2_1>
<Zeroes11>11-bytes text:\0\0\0\0\0\0\0\0\0\0\0</Zeroes11>
<Unknown1>4 = 0x4 = 0b100</Unknown1>
<ATIAMDSignature_SP761295520>10-bytes text: 761295520</ATIAMDSignature_SP761295520>
<Zeroes6_1>6-bytes text:\0\0\0\0\0\0</Zeroes6_1>
<Unknown2_2>677 = 0x2A5 = 0b1010100101</Unknown2_2>
<Zeroes6_2>6-bytes text:\0\0\0\0\0\0</Zeroes6_2>
<AtomRomHeaderOffset>556 = 0x22C = 0b1000101100</AtomRomHeaderOffset>
<ComputedOffsetToNextHeader>0xE800</ComputedOffsetToNextHeader>
<ComputedJmpTarget>0x2B3</ComputedJmpTarget>
</EFI_LEGACY_EXPANSION_AMD_ROM_HEADER>
<MostlyText info=" 482bytes [0x4A-22C) values 00000000000030342F31372F3137..585C636F6E6669672E6800000090" as_text="\0\0\0\0\0\004/17/17 03:28\0\01\0\0\0\xE9\xB8\x03\0\xE9\xC7\x03\0\0\0\xF4\0\0\x13\0\0\0\xD0\x01\0B\x0A \xE1\x02\x80~\0\xE2\x10D\x02\x12\0\0\0\0\0\0<@\x0E\x02\x07<\x01\x1A\0\x04\0\0\0\xEE\xA0\xFF\x06\0\x080@\x0E\x01\0\0\0\0\0\0\x14\x03\0\0\0\0\0\0\xBE~\x11\0\xB9\x07\x1A\xD6P,\0\0\0\0\0\0\0\0\0\0\x14@AC\0\0\0\0\x10\0\0\0B\0\0\0\xF0}\xE6\x07 \0 \0\x12\0\x0E\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0115-D009PI2-101\0POLARIS20\0PCI_EXPRESS\0GDDR5\0\x0D\x0A67DFHB.15.50.2.1.AS14 \x0D\x0A\0\x0D\x0A \x0D\x0A\0(C) 1988-2010, Advanced Micro Devices, Inc.\0ATOMBIOSBK-AMD VER015.050.002.001.000000\0AS14.BIN \01398877 \0381643 \0 \0ASUS_POLARIS20_D009PI2_DUAL_RX580_O8G_HYNIX\config.h\0\0\0\x90"/>
<ATOM_ROM_HEADER addr="0x22C-0x250 len=36=0x24">
<sHeader>
<usStructureSize>36 = 0x24 = 0b100100</usStructureSize>
<ucTableFormatRevision>1</ucTableFormatRevision>
<ucTableContentRevision>1</ucTableContentRevision>
</sHeader>
<uaFirmWareSignature>4-bytes text:ATOM</uaFirmWareSignature>
<usBiosRuntimeSegmentAddress>49152 = 0xC000 = 0b1100000000000000</usBiosRuntimeSegmentAddress>
<usProtectedModeInfoOffset>977 = 0x3D1 = 0b1111010001</usProtectedModeInfoOffset>
<usConfigFilenameOffset>460 = 0x1CC = 0b111001100</usConfigFilenameOffset>
<usCRC_BlockOffset>629 = 0x275 = 0b1001110101</usCRC_BlockOffset>
<usBIOS_BootupMessageOffset>288 = 0x120 = 0b100100000</usBIOS_BootupMessageOffset>
<usInt10Offset>1014 = 0x3F6 = 0b1111110110</usInt10Offset>
<usPciBusDevInitCode>0</usPciBusDevInitCode>
<usIoBaseAddress>0</usIoBaseAddress>
<usSubsystemVendorID>4163 = 0x1043 = 0b1000001000011</usSubsystemVendorID>
<usSubsystemID>1313 = 0x521 = 0b10100100001</usSubsystemID>
<usPCI_InfoOffset>592 = 0x250 = 0b1001010000</usPCI_InfoOffset>
<usMasterCommandTableOffset>38748 = 0x975C = 0b1001011101011100</usMasterCommandTableOffset>
<usMasterDataTableOffset>38914 = 0x9802 = 0b1001100000000010</usMasterDataTableOffset>
<ucExtendedFunctionCode>160 = 0xA0 = 0b10100000</ucExtendedFunctionCode>
<ucReserved>0</ucReserved>
</ATOM_ROM_HEADER>
<PCIR_2_3_DATA_STRUCTURE addr="0x250-0x274 len=36=0x24">
<Signature_PCIR>4-bytes text:PCIR</Signature_PCIR>
<usVendorID>4098 = 0x1002 = 0b1000000000010</usVendorID>
<usDeviceID>26591 = 0x67DF = 0b110011111011111</usDeviceID>
<DeviceListOffset>0</DeviceListOffset>
<HeaderLength>24 = 0x18 = 0b11000</HeaderLength>
<Revision>0</Revision>
<ClassCode_VGA_Controller_is_003>3-bytes text:\0\0\x03</ClassCode_VGA_Controller_is_003>
<ImageLength_in_512bytes>116 = 0x74 = 0b1110100</ImageLength_in_512bytes>
<CodeRevision>3890 = 0xF32 = 0b111100110010</CodeRevision>
<CodeType_PC_Compatible_is_0__UEFI_is_3>0</CodeType_PC_Compatible_is_0__UEFI_is_3>
<Indicator_last_is_0x80>0</Indicator_last_is_0x80>
<MaxRuntimeImageLength>0</MaxRuntimeImageLength>
<SomeTextWithAMD>12-bytes text:AMD ATOMBIOS</SomeTextWithAMD>
</PCIR_2_3_DATA_STRUCTURE>
<ATOM_CMD_TABLES addr="0x975C-0x9802 len=166=0xA6">
<sHeader>
<usStructureSize>166 = 0xA6 = 0b10100110</usStructureSize>
<ucTableFormatRevision>1</ucTableFormatRevision>
<ucTableContentRevision>1</ucTableContentRevision>
</sHeader>
</ATOM_CMD_TABLES>
</OptionRomAndAtomHeaders>
<AtomMasterDataTables>
<ATOM_DATA_TABLES addr="0x9802-0x984C len=74=0x4A">
<sHeader>
<usStructureSize>74 = 0x4A = 0b1001010</usStructureSize>
<ucTableFormatRevision>1</ucTableFormatRevision>
<ucTableContentRevision>1</ucTableContentRevision>
</sHeader>
<UtilityPipeLine>0</UtilityPipeLine>
<MultimediaCapabilityInfo>0</MultimediaCapabilityInfo>
<MultimediaConfigInfo>0</MultimediaConfigInfo>
<StandardVESA_Timing>38988 = 0x984C = 0b1001100001001100</StandardVESA_Timing>
<FirmwareInfo>39216 = 0x9930 = 0b1001100100110000</FirmwareInfo>
<PaletteData>39324 = 0x999C = 0b1001100110011100</PaletteData>
<LCD_Info>39376 = 0x99D0 = 0b1001100111010000</LCD_Info>
<DIGTransmitterInfo>0</DIGTransmitterInfo>
<SMU_Info>43522 = 0xAA02 = 0b1010101000000010</SMU_Info>
<SupportedDevicesInfo>0</SupportedDevicesInfo>
<GPIO_I2C_Info>39454 = 0x9A1E = 0b1001101000011110</GPIO_I2C_Info>
<VRAM_UsageByFirmware>39674 = 0x9AFA = 0b1001101011111010</VRAM_UsageByFirmware>
<GPIO_Pin_LUT>39686 = 0x9B06 = 0b1001101100000110</GPIO_Pin_LUT>
<VESA_ToInternalModeLUT>39718 = 0x9B26 = 0b1001101100100110</VESA_ToInternalModeLUT>
<GFX_Info>39834 = 0x9B9A = 0b1001101110011010</GFX_Info>
<PowerPlayInfo>39858 = 0x9BB2 = 0b1001101110110010</PowerPlayInfo>
<GPUVirtualizationInfo>0</GPUVirtualizationInfo>
<SaveRestoreInfo>43498 = 0xA9EA = 0b1010100111101010</SaveRestoreInfo>
<PPLL_SS_Info>0</PPLL_SS_Info>
<OemInfo>40692 = 0x9EF4 = 0b1001111011110100</OemInfo>
<XTMDS_Info>0</XTMDS_Info>
<MclkSS_Info>0</MclkSS_Info>
<Object_Header>40698 = 0x9EFA = 0b1001111011111010</Object_Header>
<IndirectIOAccess>41772 = 0xA32C = 0b1010001100101100</IndirectIOAccess>
<MC_InitParameter>41048 = 0xA058 = 0b1010000001011000</MC_InitParameter>
<ASIC_VDDC_Info>0</ASIC_VDDC_Info>
<ASIC_InternalSS_Info>43358 = 0xA95E = 0b1010100101011110</ASIC_InternalSS_Info>
<TV_VideoMode>43398 = 0xA986 = 0b1010100110000110</TV_VideoMode>
<VRAM_Info>41898 = 0xA3AA = 0b1010001110101010</VRAM_Info>
<MemoryTrainingInfo>0</MemoryTrainingInfo>
<IntegratedSystemInfo>0</IntegratedSystemInfo>
<ASIC_ProfilingInfo>43020 = 0xA80C = 0b1010100000001100</ASIC_ProfilingInfo>
<VoltageObjectInfo>43288 = 0xA918 = 0b1010100100011000</VoltageObjectInfo>
<PowerSourceInfo>0</PowerSourceInfo>
<ServiceInfo>43578 = 0xAA3A = 0b1010101000111010</ServiceInfo>
</ATOM_DATA_TABLES>
<ATOM_FIRMWARE_INFO addr="0x9930-0x9992 len=98=0x62">
<sHeader>
<usStructureSize>108 = 0x6C = 0b1101100</usStructureSize>
<ucTableFormatRevision>2 = 0x2 = 0b10</ucTableFormatRevision>
<ucTableContentRevision>2 = 0x2 = 0b10</ucTableContentRevision>
</sHeader>
<ulFirmwareRevision>254935553 = 0xF320201 = 0b1111001100100000001000000001</ulFirmwareRevision>
<ulDefaultEngineClock_in10khz_asic_init_arg0>30000 = 0x7530 = 0b111010100110000</ulDefaultEngineClock_in10khz_asic_init_arg0>
<ulDefaultMemoryClock_in10khz_asic_init_arg1>30000 = 0x7530 = 0b111010100110000</ulDefaultMemoryClock_in10khz_asic_init_arg1>
<ulSPLL_OutputFreq_in10khz>0</ulSPLL_OutputFreq_in10khz>
<ulGPUPLL_OutputFreq_in10khz>360000 = 0x57E40 = 0b1010111111001000000</ulGPUPLL_OutputFreq_in10khz>
<ulReserved1>0</ulReserved1>
<ulReserved2>0</ulReserved2>
<ulMaxPixelClockPLL_Output_in10khz>600000 = 0x927C0 = 0b10010010011111000000</ulMaxPixelClockPLL_Output_in10khz>
<ulBinaryAlteredInfo>0</ulBinaryAlteredInfo>
<ulDefaultDispEngineClkFreq_in10khz>62610 = 0xF492 = 0b1111010010010010</ulDefaultDispEngineClkFreq_in10khz>
<ucReserved3>0</ucReserved3>
<ucMinAllowedBL_Level>0</ucMinAllowedBL_Level>
<usBootUpVDDCVoltage_in_mV>900 = 0x384 = 0b1110000100</usBootUpVDDCVoltage_in_mV>
<usLcdMinPixelClockPLL_Output_inMHz>2970 = 0xB9A = 0b101110011010</usLcdMinPixelClockPLL_Output_inMHz>
<usLcdMaxPixelClockPLL_Output_inMHz>6000 = 0x1770 = 0b1011101110000</usLcdMaxPixelClockPLL_Output_inMHz>
<ulReserved4>0</ulReserved4>
<ulMinPixelClockPLL_Output_in10khz>297000 = 0x48828 = 0b1001000100000101000</ulMinPixelClockPLL_Output_in10khz>
<ucRemoteDisplayConfig>0</ucRemoteDisplayConfig>
<ucReserved5>5-bytes text:\0\0\0\0\0</ucReserved5>
<ulReserved6>0</ulReserved6>
<ulReserved7>2621440000 = 0x9C400000 = 0b10011100010000000000000000000000</ulReserved7>
<usReserved11_usMaxPixelClockDAC_in10khz>2500 = 0x9C4 = 0b100111000100</usReserved11_usMaxPixelClockDAC_in10khz>
<usMinPixelClockPLL_Input_in10khz>10000 = 0x2710 = 0b10011100010000</usMinPixelClockPLL_Input_in10khz>
<usMaxPixelClockPLL_Input_in10khz>850 = 0x352 = 0b1101010010</usMaxPixelClockPLL_Input_in10khz>
<usBootUpVDDCIVoltage_in_mV>16414 = 0x401E = 0b100000000011110</usBootUpVDDCIVoltage_in_mV>
<usFirmwareCapability>10000 = 0x2710 = 0b10011100010000</usFirmwareCapability>
<usCoreReferenceClock_in10khz>10000 = 0x2710 = 0b10011100010000</usCoreReferenceClock_in10khz>
<usMemoryReferenceClock_in10khz>10000 = 0x2710 = 0b10011100010000</usMemoryReferenceClock_in10khz>
<usUniphyDPModeExtClkFreq_in10khz>0</usUniphyDPModeExtClkFreq_in10khz>
<ucMemoryModule_ID>0</ucMemoryModule_ID>
<ucCoolingSolution1IsLiquid>0</ucCoolingSolution1IsLiquid>
<ucProductBranding>14 = 0xE = 0b1110</ucProductBranding>
<ucReserved9>6 = 0x6 = 0b110</ucReserved9>
<usBootUpMVDDCVoltage_in_mV>0</usBootUpMVDDCVoltage_in_mV>
<usBootUpVDDGFXVoltage_in_mV>0</usBootUpVDDGFXVoltage_in_mV>
</ATOM_FIRMWARE_INFO>
<ATOM_GPIO_I2C_INFO__skept_in_forum_post/>
<ATOM_POWERPLAY_TABLE addr="0x9BB2-0x9BFF len=77=0x4D">
<sHeader>
<usStructureSize>833 = 0x341 = 0b1101000001</usStructureSize>
<ucTableFormatRevision>7 = 0x7 = 0b111</ucTableFormatRevision>
<ucTableContentRevision>1</ucTableContentRevision>
</sHeader>
<ucTableRevision>0</ucTableRevision>
<usTableSize>77 = 0x4D = 0b1001101</usTableSize>
<ulGoldenPPID>1665 = 0x681 = 0b11010000001</ulGoldenPPID>
<ulGoldenRevision>10394 = 0x289A = 0b10100010011010</ulGoldenRevision>
<usFormatID>25 = 0x19 = 0b11001</usFormatID>
<usVoltageTime>0</usVoltageTime>
<ulPlatformCaps>17203200 = 0x1068000 = 0b1000001101000000000000000</ulPlatformCaps>
<ulMaxODEngineClock>200000 = 0x30D40 = 0b110000110101000000</ulMaxODEngineClock>
<ulMaxODMemoryClock>225000 = 0x36EE8 = 0b110110111011101000</ulMaxODMemoryClock>
<usPowerControlLimit>50 = 0x32 = 0b110010</usPowerControlLimit>
<usUlvVoltageOffset>25 = 0x19 = 0b11001</usUlvVoltageOffset>
<usStateArrayOffset>77 = 0x4D = 0b1001101</usStateArrayOffset>
<usFanTableOffset>673 = 0x2A1 = 0b1010100001</usFanTableOffset>
<usThermalControllerOffset>664 = 0x298 = 0b1010011000</usThermalControllerOffset>
<usReserv>0</usReserv>
<usMclkDependencyTableOffset>437 = 0x1B5 = 0b110110101</usMclkDependencyTableOffset>
<usSclkDependencyTableOffset>315 = 0x13B = 0b100111011</usSclkDependencyTableOffset>
<usVddcLookupTableOffset>119 = 0x77 = 0b1110111</usVddcLookupTableOffset>
<usVddgfxLookupTableOffset>249 = 0xF9 = 0b11111001</usVddgfxLookupTableOffset>
<usMMDependencyTableOffset>478 = 0x1DE = 0b111011110</usMMDependencyTableOffset>
<usVCEStateTableOffset>774 = 0x306 = 0b1100000110</usVCEStateTableOffset>
<usPPMTableOffset>0</usPPMTableOffset>
<usPowerTuneTableOffset>721 = 0x2D1 = 0b1011010001</usPowerTuneTableOffset>
<usHardLimitTableOffset>0</usHardLimitTableOffset>
<usPCIETableOffset>800 = 0x320 = 0b1100100000</usPCIETableOffset>
<usGPIOTableOffset>826 = 0x33A = 0b1100111010</usGPIOTableOffset>
<usReserved>12-bytes text:L\x11\x02\0S\x07\0\0\0\0\0\0</usReserved>
</ATOM_POWERPLAY_TABLE>
<AtomVoltageTables_skept_in_forum_post/>
<AtomClockTables>
<ATOM_SCLK_TABLE_skept_in_forum_post/>
<ATOM_MCLK_TABLE addr="0x9D67-0x9D69 len=2=0x2 Name=MclkDependencyTable">
<ucRevId>0</ucRevId>
<ucNumEntries>3 = 0x3 = 0b11</ucNumEntries>
</ATOM_MCLK_TABLE>
<ATOM_MCLK_ENTRY addr="0x9D69-0x9D76 len=13=0xD">
<ucVddcInd>0</ucVddcInd>
<usVddci>800 = 0x320 = 0b1100100000</usVddci>
<usVddgfxOffset>0</usVddgfxOffset>
<usMvdd>1000 = 0x3E8 = 0b1111101000</usMvdd>
<ulMclk>30000 = 0x7530 = 0b111010100110000</ulMclk>
<usReserved>0</usReserved>
</ATOM_MCLK_ENTRY>
<ATOM_MCLK_ENTRY addr="0x9D76-0x9D83 len=13=0xD">
<ucVddcInd>8 = 0x8 = 0b1000</ucVddcInd>
<usVddci>850 = 0x352 = 0b1101010010</usVddci>
<usVddgfxOffset>0</usVddgfxOffset>
<usMvdd>1000 = 0x3E8 = 0b1111101000</usMvdd>
<ulMclk>100000 = 0x186A0 = 0b11000011010100000</ulMclk>
<usReserved>0</usReserved>
</ATOM_MCLK_ENTRY>
<ATOM_MCLK_ENTRY addr="0x9D83-0x9D90 len=13=0xD">
<ucVddcInd>11 = 0xB = 0b1011</ucVddcInd>
<usVddci>950 = 0x3B6 = 0b1110110110</usVddci>
<usVddgfxOffset>0</usVddgfxOffset>
<usMvdd>1000 = 0x3E8 = 0b1111101000</usMvdd>
<ulMclk>200000 = 0x30D40 = 0b110000110101000000</ulMclk>
<usReserved>0</usReserved>
</ATOM_MCLK_ENTRY>
</AtomClockTables>
<AtomMMDependencyTable_skept_in_forum_post/>
<ATOM_FAN_TABLE addr="0x9E53-0x9E80 len=45=0x2D">
<ucRevId>9 = 0x9 = 0b1001</ucRevId>
<ucTHyst>3 = 0x3 = 0b11</ucTHyst>
<usTMin>4000 = 0xFA0 = 0b111110100000</usTMin>
<usTMed>6500 = 0x1964 = 0b1100101100100</usTMed>
<usTHigh>8500 = 0x2134 = 0b10000100110100</usTHigh>
<usPWMMin>2000 = 0x7D0 = 0b11111010000</usPWMMin>
<usPWMMed>4000 = 0xFA0 = 0b111110100000</usPWMMed>
<usPWMHigh>6000 = 0x1770 = 0b1011101110000</usPWMHigh>
<usTMax>10900 = 0x2A94 = 0b10101010010100</usTMax>
<ucFanControlMode>1</ucFanControlMode>
<usFanPWMMax>100 = 0x64 = 0b1100100</usFanPWMMax>
<usFanOutputSensitivity>4836 = 0x12E4 = 0b1001011100100</usFanOutputSensitivity>
<usFanRPMMax>2150 = 0x866 = 0b100001100110</usFanRPMMax>
<ulMinFanSCLKAcousticLimit>90000 = 0x15F90 = 0b10101111110010000</ulMinFanSCLKAcousticLimit>
<ucTargetTemperature>70 = 0x46 = 0b1000110</ucTargetTemperature>
<ucMinimumPWMLimit>44 = 0x2C = 0b101100</ucMinimumPWMLimit>
<usFanGainEdge>150 = 0x96 = 0b10010110</usFanGainEdge>
<usFanGainHotspot>150 = 0x96 = 0b10010110</usFanGainHotspot>
<usFanGainLiquid>100 = 0x64 = 0b1100100</usFanGainLiquid>
<usFanGainVrVddc>150 = 0x96 = 0b10010110</usFanGainVrVddc>
<usFanGainVrMvdd>150 = 0x96 = 0b10010110</usFanGainVrMvdd>
<usFanGainPlx>150 = 0x96 = 0b10010110</usFanGainPlx>
<usFanGainHbm>100 = 0x64 = 0b1100100</usFanGainHbm>
<usReserved>12801 = 0x3201 = 0b11001000000001</usReserved>
</ATOM_FAN_TABLE>
<ATOM_Polaris_PowerTune_Table addr="0x9E83-0x9EB8 len=53=0x35">
<ucRevId>4 = 0x4 = 0b100</ucRevId>
<usTDP>145 = 0x91 = 0b10010001</usTDP>
<usConfigurableTDP>0</usConfigurableTDP>
<usTDC>132 = 0x84 = 0b10000100</usTDC>
<usBatteryPowerLimit>145 = 0x91 = 0b10010001</usBatteryPowerLimit>
<usSmallPowerLimit>145 = 0x91 = 0b10010001</usSmallPowerLimit>
<usLowCACLeakage>0</usLowCACLeakage>
<usHighCACLeakage>0</usHighCACLeakage>
<usMaximumPowerDeliveryLimit>145 = 0x91 = 0b10010001</usMaximumPowerDeliveryLimit>
<usTjMax>90 = 0x5A = 0b1011010</usTjMax>
<usPowerTuneDataSetID>0</usPowerTuneDataSetID>
<usEDCLimit>0</usEDCLimit>
<usSoftwareShutdownTemp>94 = 0x5E = 0b1011110</usSoftwareShutdownTemp>
<usClockStretchAmount>2 = 0x2 = 0b10</usClockStretchAmount>
<usTemperatureLimitHotspot>105 = 0x69 = 0b1101001</usTemperatureLimitHotspot>
<usTemperatureLimitLiquid1>80 = 0x50 = 0b1010000</usTemperatureLimitLiquid1>
<usTemperatureLimitLiquid2>80 = 0x50 = 0b1010000</usTemperatureLimitLiquid2>
<usTemperatureLimitVrVddc>115 = 0x73 = 0b1110011</usTemperatureLimitVrVddc>
<usTemperatureLimitVrMvdd>115 = 0x73 = 0b1110011</usTemperatureLimitVrMvdd>
<usTemperatureLimitPlx>95 = 0x5F = 0b1011111</usTemperatureLimitPlx>
<ucLiquid1_I2C_address>0</ucLiquid1_I2C_address>
<ucLiquid2_I2C_address>0</ucLiquid2_I2C_address>
<ucLiquid_I2C_Line>144 = 0x90 = 0b10010000</ucLiquid_I2C_Line>
<ucVr_I2C_address>96 = 0x60 = 0b1100000</ucVr_I2C_address>
<ucVr_I2C_Line>150 = 0x96 = 0b10010110</ucVr_I2C_Line>
<ucPlx_I2C_address>0</ucPlx_I2C_address>
<ucPlx_I2C_Line>144 = 0x90 = 0b10010000</ucPlx_I2C_Line>
<usBoostPowerLimit>0</usBoostPowerLimit>
<ucCKS_LDO_REFSEL>6 = 0x6 = 0b110</ucCKS_LDO_REFSEL>
<ucHotSpotOnly>0</ucHotSpotOnly>
<ucReserve>0</ucReserve>
<usReserve>0</usReserve>
</ATOM_Polaris_PowerTune_Table>
<AtomVideoOutTables>
<ATOM_OBJECT_HEADER_V3 addr="0x9EFA-0x9F0C len=18=0x12">
<sHeader>
<usStructureSize>350 = 0x15E = 0b101011110</usStructureSize>
<ucTableFormatRevision>1</ucTableFormatRevision>
<ucTableContentRevision>3 = 0x3 = 0b11</ucTableContentRevision>
</sHeader>
<usDeviceSupport>3720 = 0xE88 = 0b111010001000</usDeviceSupport>
<usConnectorObjectTableOffset>72 = 0x48 = 0b1001000</usConnectorObjectTableOffset>
<usRouterObjectTableOffset>0</usRouterObjectTableOffset>
<usEncoderObjectTableOffset>251 = 0xFB = 0b11111011</usEncoderObjectTableOffset>
<usProtectionObjectTableOffset>0</usProtectionObjectTableOffset>
<usDisplayPathTableOffset>18 = 0x12 = 0b10010</usDisplayPathTableOffset>
<usMiscObjectTableOffset>0</usMiscObjectTableOffset>
</ATOM_OBJECT_HEADER_V3>
<ATOM_DISPLAY_OBJECT_PATH_TABLE_skept_in_forum_post/>
<Connectors>
<ATOM_OBJECT_TABLE>
<ATOM_OBJECT_TABLE addr="0x9F42-0x9F46 len=4=0x4">
<ucNumberOfObjects>5 = 0x5 = 0b101</ucNumberOfObjects>
<ucPadding0>0</ucPadding0>
<ucPadding1>0</ucPadding1>
<ucPadding2>0</ucPadding2>
</ATOM_OBJECT_TABLE>
<ATOM_OBJECT addr="0x9F46-0x9F4E len=8=0x8">
<usObjectID>
<KindInNamespace>CONNECTOR_OBJECT_ID_DISPLAYPORT = 0x13</KindInNamespace>
<Namespace>GRAPH_OBJECT_TYPE_CONNECTOR</Namespace>
<Index>1</Index>
</usObjectID>
<usSrcDstTableOffset>116 = 0x74 = 0b1110100</usSrcDstTableOffset>
<usRecordOffset>122 = 0x7A = 0b1111010</usRecordOffset>
<usReserved>0</usReserved>
</ATOM_OBJECT>
<ATOM_COMMON_RECORD_HEADER addr="0x9F74-0x9F76 len=2=0x2">
<ucRecordSize>12 = 0xC = 0b1100</ucRecordSize>
<RecordType>ATOM_CONNECTOR_DEVICE_TAG_RECORD_TYPE = 0x4</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 10bytes [0x9F76-9F80) values 01001002000008000000"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9F80-0x9F82 len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_I2C_RECORD_TYPE = 0x1</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9F82-9F84) values 9100"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9F84-0x9F86 len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_HPD_INT_RECORD_TYPE = 0x2</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9F86-9F88) values 0100"/>
<ATOM_OBJECT addr="0x9F4E-0x9F56 len=8=0x8">
<usObjectID>
<KindInNamespace>CONNECTOR_OBJECT_ID_DISPLAYPORT = 0x13</KindInNamespace>
<Namespace>GRAPH_OBJECT_TYPE_CONNECTOR</Namespace>
<Index>2 = 0x2 = 0b10</Index>
</usObjectID>
<usSrcDstTableOffset>143 = 0x8F = 0b10001111</usSrcDstTableOffset>
<usRecordOffset>149 = 0x95 = 0b10010101</usRecordOffset>
<usReserved>0</usReserved>
</ATOM_OBJECT>
<ATOM_COMMON_RECORD_HEADER addr="0x9F8F-0x9F91 len=2=0x2">
<ucRecordSize>12 = 0xC = 0b1100</ucRecordSize>
<RecordType>ATOM_CONNECTOR_DEVICE_TAG_RECORD_TYPE = 0x4</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 10bytes [0x9F91-9F9B) values 01002002000080000000"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9F9B-0x9F9D len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_I2C_RECORD_TYPE = 0x1</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9F9D-9F9F) values 9300"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9F9F-0x9FA1 len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_HPD_INT_RECORD_TYPE = 0x2</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9FA1-9FA3) values 0500"/>
<ATOM_OBJECT addr="0x9F56-0x9F5E len=8=0x8">
<usObjectID>
<KindInNamespace>CONNECTOR_OBJECT_ID_HDMI_TYPE_A = 0xC</KindInNamespace>
<Namespace>GRAPH_OBJECT_TYPE_CONNECTOR</Namespace>
<Index>1</Index>
</usObjectID>
<usSrcDstTableOffset>170 = 0xAA = 0b10101010</usSrcDstTableOffset>
<usRecordOffset>176 = 0xB0 = 0b10110000</usRecordOffset>
<usReserved>0</usReserved>
</ATOM_OBJECT>
<ATOM_COMMON_RECORD_HEADER addr="0x9FAA-0x9FAC len=2=0x2">
<ucRecordSize>12 = 0xC = 0b1100</ucRecordSize>
<RecordType>ATOM_CONNECTOR_DEVICE_TAG_RECORD_TYPE = 0x4</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 10bytes [0x9FAC-9FB6) values 01003002000000020000"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9FB6-0x9FB8 len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_I2C_RECORD_TYPE = 0x1</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9FB8-9FBA) values 9000"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9FBA-0x9FBC len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_HPD_INT_RECORD_TYPE = 0x2</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9FBC-9FBE) values 0600"/>
<ATOM_OBJECT addr="0x9F5E-0x9F66 len=8=0x8">
<usObjectID>
<KindInNamespace>CONNECTOR_OBJECT_ID_HDMI_TYPE_A = 0xC</KindInNamespace>
<Namespace>GRAPH_OBJECT_TYPE_CONNECTOR</Namespace>
<Index>2 = 0x2 = 0b10</Index>
</usObjectID>
<usSrcDstTableOffset>197 = 0xC5 = 0b11000101</usSrcDstTableOffset>
<usRecordOffset>203 = 0xCB = 0b11001011</usRecordOffset>
<usReserved>0</usReserved>
</ATOM_OBJECT>
<ATOM_COMMON_RECORD_HEADER addr="0x9FC5-0x9FC7 len=2=0x2">
<ucRecordSize>12 = 0xC = 0b1100</ucRecordSize>
<RecordType>ATOM_CONNECTOR_DEVICE_TAG_RECORD_TYPE = 0x4</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 10bytes [0x9FC7-9FD1) values 01004002000000040000"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9FD1-0x9FD3 len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_I2C_RECORD_TYPE = 0x1</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9FD3-9FD5) values 9200"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9FD5-0x9FD7 len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_HPD_INT_RECORD_TYPE = 0x2</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9FD7-9FD9) values 0400"/>
<ATOM_OBJECT addr="0x9F66-0x9F6E len=8=0x8">
<usObjectID>
<KindInNamespace>CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D = 0x4</KindInNamespace>
<Namespace>GRAPH_OBJECT_TYPE_CONNECTOR</Namespace>
<Index>1</Index>
</usObjectID>
<usSrcDstTableOffset>224 = 0xE0 = 0b11100000</usSrcDstTableOffset>
<usRecordOffset>230 = 0xE6 = 0b11100110</usRecordOffset>
<usReserved>0</usReserved>
</ATOM_OBJECT>
<ATOM_COMMON_RECORD_HEADER addr="0x9FE0-0x9FE2 len=2=0x2">
<ucRecordSize>12 = 0xC = 0b1100</ucRecordSize>
<RecordType>ATOM_CONNECTOR_DEVICE_TAG_RECORD_TYPE = 0x4</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 10bytes [0x9FE2-9FEC) values 01005002000000080000"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9FEC-0x9FEE len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_I2C_RECORD_TYPE = 0x1</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9FEE-9FF0) values 9500"/>
<ATOM_COMMON_RECORD_HEADER addr="0x9FF0-0x9FF2 len=2=0x2">
<ucRecordSize>4 = 0x4 = 0b100</ucRecordSize>
<RecordType>ATOM_HPD_INT_RECORD_TYPE = 0x2</RecordType>
</ATOM_COMMON_RECORD_HEADER>
<extra desc=" 2bytes [0x9FF2-9FF4) values 0300"/>
</ATOM_OBJECT_TABLE>
</Connectors>
<Encoders_skept_in_forum_post/>
<Routers>
<Table-not-present name="ATOM_OBJECT_TABLE"/>
</Routers>
</AtomVideoOutTables>
<AtomVRamTables_skept_in_forum_post/>
<ATOM_VOLTAGE_OBJECT_INFO_V3_1>
<ATOM_VOLTAGE_OBJECT_INFO_V3_1 addr="0xA918-0xA91C len=4=0x4">
<sHeader>
<usStructureSize>70 = 0x46 = 0b1000110</usStructureSize>
<ucTableFormatRevision>3 = 0x3 = 0b11</ucTableFormatRevision>
<ucTableContentRevision>1</ucTableContentRevision>
</sHeader>
</ATOM_VOLTAGE_OBJECT_INFO_V3_1>
<atom_voltage_object_header_v4 addr="0xA91C-0xA920 len=4=0x4">
<ucVoltageType>VOLTAGE_TYPE_VDDC_0x1</ucVoltageType>
<ucVoltageMode>VOLTAGE_OBJ_VR_I2C_INIT_SEQ_0x3</ucVoltageMode>
<usSize>18 = 0x12 = 0b10010</usSize>
</atom_voltage_object_header_v4>
<atom_i2c_voltage_object_v4_fields addr="0xA920-0xA928 len=8=0x8">
<regulator_id>8 = 0x8 = 0b1000</regulator_id>
<i2c_id>
<gpio_id>150 = 0x96 = 0b10010110</gpio_id>
<bfHW_Capable>true</bfHW_Capable>
<bfHW_EngineID>1</bfHW_EngineID>
<bfI2C_LineMux>6 = 0x6 = 0b110</bfI2C_LineMux>
<Description>150 = 0x96 = 0b10010110</Description>
</i2c_id>
<i2c_slave_addr>
<shifted_i2c_slave_addr>96 = 0x60 = 0b1100000</shifted_i2c_slave_addr>
</i2c_slave_addr>
<i2c_control_offset>0</i2c_control_offset>
<i2c_flag>0</i2c_flag>
<i2c_speed>0</i2c_speed>
<reserved_0xA>0</reserved_0xA>
<reserved_0xB>0</reserved_0xB>
</atom_i2c_voltage_object_v4_fields>
<atom_i2c_data_entry addr="0xA928-0xA92C len=4=0x4">
<i2c_reg_index>50 = 0x32 = 0b110010</i2c_reg_index>
<i2c_reg_data>204 = 0xCC = 0b11001100</i2c_reg_data>
</atom_i2c_data_entry>
<FINAL_atom_i2c_data_entry addr="0xA92C-0xA92E len=2=0x2">
<final_entry_index>255 = 0xFF = 0b11111111</final_entry_index>
</FINAL_atom_i2c_data_entry>
<atom_voltage_object_header_v4 addr="0xA92E-0xA932 len=4=0x4">
<ucVoltageType>VOLTAGE_TYPE_VDDC_0x1</ucVoltageType>
<ucVoltageMode>VOLTAGE_OBJ_SVID2_0x7</ucVoltageMode>
<usSize>12 = 0xC = 0b1100</usSize>
</atom_voltage_object_header_v4>
<atom_voltage_object_header_v4 addr="0xA93A-0xA93E len=4=0x4">
<ucVoltageType>VOLTAGE_TYPE_VDDCI_0x4</ucVoltageType>
<ucVoltageMode>VOLTAGE_OBJ_GPIO_LUT_0x0</ucVoltageMode>
<usSize>36 = 0x24 = 0b100100</usSize>
</atom_voltage_object_header_v4>
<atom_gpio_voltage_object_v4_fields addr="0xA93E-0xA946 len=8=0x8">
<gpio_control_id>0</gpio_control_id>
<gpio_entry_num>4 = 0x4 = 0b100</gpio_entry_num>
<phase_delay_us>0</phase_delay_us>
<reserved>0</reserved>
<gpio_mask_val>1081346 = 0x108002 = 0b100001000000000000010</gpio_mask_val>
</atom_gpio_voltage_object_v4_fields>
<atom_voltage_gpio_map_lut addr="0xA946-0xA94C len=6=0x6">
<voltage_gpio_reg_val>0</voltage_gpio_reg_val>
<voltage_level_mv>800 = 0x320 = 0b1100100000</voltage_level_mv>
</atom_voltage_gpio_map_lut>
<atom_voltage_gpio_map_lut addr="0xA94C-0xA952 len=6=0x6">
<voltage_gpio_reg_val>1048576 = 0x100000 = 0b100000000000000000000</voltage_gpio_reg_val>
<voltage_level_mv>850 = 0x352 = 0b1101010010</voltage_level_mv>
</atom_voltage_gpio_map_lut>
<atom_voltage_gpio_map_lut addr="0xA952-0xA958 len=6=0x6">
<voltage_gpio_reg_val>2 = 0x2 = 0b10</voltage_gpio_reg_val>
<voltage_level_mv>900 = 0x384 = 0b1110000100</voltage_level_mv>
</atom_voltage_gpio_map_lut>
<atom_voltage_gpio_map_lut addr="0xA958-0xA95E len=6=0x6">
<voltage_gpio_reg_val>32768 = 0x8000 = 0b1000000000000000</voltage_gpio_reg_val>
<voltage_level_mv>950 = 0x3B6 = 0b1110110110</voltage_level_mv>
</atom_voltage_gpio_map_lut>
</ATOM_VOLTAGE_OBJECT_INFO_V3_1>
</AtomMasterDataTables>
<AtomMasterCommands>
<CMDS-NOT-IMPLEMENTED>
<EnableCRTCMemReq tbindex="6"/>
<DVOEncoderControl tbindex="8"/>
<DAC_LoadDetection tbindex="21"/>
<LVTMAEncoderControl tbindex="22"/>
<HW_Misc_Operation tbindex="23"/>
<DAC1EncoderControl tbindex="24"/>
<DAC2EncoderControl tbindex="25"/>
<DVOOutputControl tbindex="26"/>
<GetConditionalGoldenSetting tbindex="28"/>
<SMC_Init tbindex="29"/>
<Gfx_Harvesting tbindex="32"/>
<GetPixelClock tbindex="36"/>
<SetCRTC_Timing tbindex="39"/>
<ExternalEncoderControl tbindex="50"/>
<TMDSAOutputControl tbindex="66"/>
<DAC1OutputControl tbindex="68"/>
<ComputeMemoryClockParam tbindex="70"/>
<GetDispObjectInfo tbindex="73"/>
<DIG1EncoderControl tbindex="74"/>
<DIG2EncoderControl tbindex="75"/>
</CMDS-NOT-IMPLEMENTED>
<ASIC_Init tbindex=" 0" header="0xAA90" code=" 143bytes [0xAA96-AB25) values 020102005247520202650207520D..02010EE50208520B0D65D005025B" format_content_rev="1.2" work_stack_in_4bytes="0" params_stack_in_1bytes="8"/>
<GetDisplaySurfaceSizetbindex=" 1" header="0xAB26" code=" 81bytes [0xAB2C-AB7D) values 37000052140208000D1A3208000B..2D08405C1B020A0141028A01405B" format_content_rev="1.2" work_stack_in_4bytes="0" params_stack_in_1bytes="0"/>
<ASIC_RegistersInit_For_ASIC_Init tbindex=" 2" header="0xAB7E" code=" 177bytes [0xAB84-AC35) values 37000001050E0002004001370300..159CA40D200105EA15209587005B" format_content_rev="1.1" work_stack_in_4bytes="4" params_stack_in_1bytes="0"/>
<MemoryControllerInit_For_ASIC_Init tbindex=" 5" header="0xAC36" code=" 269bytes [0xAC3C-AD49) values 3700000301000054202415012500..FC521E5C22800A0300520752485B" format_content_rev="1.1" work_stack_in_4bytes="4" params_stack_in_1bytes="0"/>
<GPIOPinControl tbindex=" 9" header="0xAD4A" code=" 249bytes [0xAD50-AE49) values 370000660C030C4100002D0A4142..4543FA000D020100445B5520005B" format_content_rev="2.1" work_stack_in_4bytes="0" params_stack_in_1bytes="4"/>
<SetEngineClock tbindex="10" header="0xAE4A" code=" 422bytes [0xAE50-AFF6) values 3700004BE5000844230001058200..50C0140350C0280350C02C0350C0" format_content_rev="1.2" work_stack_in_4bytes="20" params_stack_in_1bytes="0"/>
<SetMemoryClock tbindex="11" header="0xAFF6" code=" 284bytes [0xAFFC-B118) values 3700005C252B08F8015420241507..EB090107252B08F80D252415035B" format_content_rev="2.1" work_stack_in_4bytes="12" params_stack_in_1bytes="4"/>
<SetPixelClock tbindex="12" header="0xB118" code="1221bytes [0xB11E-B5E3) values 3700003D2501FF4495043D250119..640024833200A3761900A3760C00" format_content_rev="1.7" work_stack_in_4bytes="8" params_stack_in_1bytes="8"/>
<EnableDispPowerGating_For_ASIC_Init tbindex="13" header="0xB5E4" code=" 385bytes [0xB5EA-B76B) values 3700003D65000744BC0056004020..4C0D41020044B7000DA5C905045B" format_content_rev="2.1" work_stack_in_4bytes="0" params_stack_in_1bytes="0"/>
<ResetMemoryDLL tbindex="14" header="0xB76C" code=" 1bytes [0xB772-B773) values 5B" format_content_rev="1.1" work_stack_in_4bytes="0" params_stack_in_1bytes="0"/>
<others_skept_in_forum_post>
</AtomMasterCommands>
<EfiGopPart>
<EFI_PCI_EXPANSION_ROM_HEADER addr="0xE800-0xE81C len=28=0x1C">
<Signature55>85 = 0x55 = 0b1010101</Signature55>
<SignatureAA>170 = 0xAA = 0b10101010</SignatureAA>
<Bit16Length_in_512bytes>114 = 0x72 = 0b1110010</Bit16Length_in_512bytes>
<EfiSignature_0x00000EF1>3825 = 0xEF1 = 0b111011110001</EfiSignature_0x00000EF1>
<EfiSubsystem_0x000B_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER>11 = 0xB = 0b1011</EfiSubsystem_0x000B_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER>
<EfiMachineType_0x8664_IMAGE_FILE_MACHINE_X64>34404 = 0x8664 = 0b1000011001100100</EfiMachineType_0x8664_IMAGE_FILE_MACHINE_X64>
<EfiCompressionType_1_for_EFI_compression>1</EfiCompressionType_1_for_EFI_compression>
<reserved_efi>8-bytes text:\0\0\0\0\0\0\0\0</reserved_efi>
<CompressableEfiImageHeaderOffset>88 = 0x58 = 0b1011000</CompressableEfiImageHeaderOffset>
<PCIRHeaderOffset>28 = 0x1C = 0b11100</PCIRHeaderOffset>
<PnPHeaderOffset>0</PnPHeaderOffset>
<ComputedOffsetToNextHeader>0xE400</ComputedOffsetToNextHeader>
</EFI_PCI_EXPANSION_ROM_HEADER>
<PCIR_2_3_DATA_STRUCTURE addr="0xE81C-0xE840 len=36=0x24">
<Signature_PCIR>4-bytes text:PCIR</Signature_PCIR>
<usVendorID>4098 = 0x1002 = 0b1000000000010</usVendorID>
<usDeviceID>26591 = 0x67DF = 0b110011111011111</usDeviceID>
<DeviceListOffset>0</DeviceListOffset>
<HeaderLength>24 = 0x18 = 0b11000</HeaderLength>
<Revision>0</Revision>
<ClassCode_VGA_Controller_is_003>3-bytes text:\0\0\x03</ClassCode_VGA_Controller_is_003>
<ImageLength_in_512bytes>114 = 0x72 = 0b1110010</ImageLength_in_512bytes>
<CodeRevision>0</CodeRevision>
<CodeType_PC_Compatible_is_0__UEFI_is_3>3 = 0x3 = 0b11</CodeType_PC_Compatible_is_0__UEFI_is_3>
<Indicator_last_is_0x80>128 = 0x80 = 0b10000000</Indicator_last_is_0x80>
<MaxRuntimeImageLength>0</MaxRuntimeImageLength>
<SomeTextWithAMD>12-bytes text:GOP AMD REV:</SomeTextWithAMD>
</PCIR_2_3_DATA_STRUCTURE>
<MostlyText info=" 24bytes [0xE840-E858) values 20782E782E782E782E780078787878007878787800000000" as_text=" x.x.x.x.x\0xxxx\0xxxx\0\0\0\0"/>
<EFI_COMPRESSED_FORMAT_HEADER addr="0xE858-0xE860 len=8=0x8">
<CompressedLengthAfterHeader>57898 = 0xE22A = 0b1110001000101010</CompressedLengthAfterHeader>
<DeCompressedLength>105272 = 0x19B38 = 0b11001101100111000</DeCompressedLength>
</EFI_COMPRESSED_FORMAT_HEADER>
<FromLastToSectionEnd info=" 374bytes [0x1CA8A-1CC00) values FFFFFFFFFFFFFFFFFFFFFFFFFFFF..FFFFFFFFFFFFFFFFFFFFFFFFFFFF" FF_count="374" NonFF_count="0"/>
</EfiGopPart>
</root-of-option-rom-dump>
</pre>
To distinguish the role of a program from other PolarisBiosEditor forks the "xml" is added in a version. It is named 1.7xml.
The source and .Net binary (windows + linux/mono) are avaiable at github:
https://github.com/galkinvv/PolarisBiosEditor-xml
I'm not going to discuss issues, but maybe will accept Merge Requests. Feel free to fork!
The only GUI addition is displaying more columns for VDDCI (only displayed in GUI, no editing enabled)
P.S. There is mining-related Ad link in app (just a link). It was added before me, I’ve just kept it paying respect to previous author. I’m not affiliated with it in any way.
Thank you! Your xml version is really incredible and useful for builds! Thank you for it!
Can you explain how to save xml to file? Because I cannot find any other option then copy paste from command line…
To redirect xml to file:
* Open cmd in a folder with PolarisBiosEditor.exe
* start application with a redirection to a file via >
like
1
PolarisBiosEditor.exe path\to\input-file.rom > outfile.xml
* close gui window to finish application and finalize/flush file writing.
Opening more than one file with redirection woudl lead to catting several xmls from different VBios in same file. This is possible, but don't look useful
bigguygeo, I haven’t enough posts on this forum to anwser your PM. The PM feature is still locked for me.
Please mail me on [email protected] (I failed to find your email).
After posting this message the PM feature enabled - see anwser)))
Returned to this thread after a while. And yes, my TCCDL is currently 4 and I have Samsung memory. Will try 6 and will also try your previous suggestion to loosen either TRCDW/TRCDWA(16 to 17) or TRCDR/TRCDRA(26 to 27). Already have TRP_RDA at 27. Very happy with the mod still, tho I’ve had to come up with a ‘summer fan config’ as I began seeing artefacts in some games in June when the weather became hot enough here. The card sounds like a jet engine while gaming again, but it is completely stable and error-free. Maybe loosening TCCDL will allow me to use the quiet fan config again, or maybe aim for 2100mhz(currently at 2050).
@TheVic1600 it will depend on what type of artifacting you are getting, if its core artifacts the only thing you can do it back down the core clock and voltage, if it is memory artifacts then loosening a few key timings a bit should see you right again or you could make those cooler mods I suggested so the memory is much more effectively cooled which would likely also cure your artifacts if they are indeed memory ones.