lfb6, thanks for doing this, and the confirm on the nvram emptying/cleaning. And thanks for pointing out nvram errors.
I think we could have checked this by running fptw64 -d backup.bin -bios. His laptop should allow for that - and he should be able to run that after putting it back together.
I ran it on my laptop, and noticed some (Text-less) Invalid NVAR enty(s), but no dump thingies.
That command with the -bios option doesn’t dump the full bios. A full bios dump attempt using fptw64 -d backup.bin won’t work for me either - I get this error: Error 185: FCERR is set
But I can dump just the bios region. You wouldn’t think there would be difference between these laptops, but my ME version is a 12.
I successfully flashed the bios and did a readback to check. The laptop seems to misbehave (as it did yesterday evening). disconnecting the cmos helped yesterday, but not today.
The flashing sequence makes no sense, as the pulses aren’t of equal length. Difficult to decipher the issue. It seems to either be 3 2 or 3 5. XPS diagnostic indicator
3 2 PCI or Video card/chip failure
3 5 SBIOS Flash Corruption
I’ve done Dell’s extensive test some months ago and it showed no issues with the video cards, so I doubt it’s 3 2.
lfb6 and everybody else, I would like to thank you from the bottom of my heart.
Absolute legends!
The laptop boots up like it used to!
To fix the boot issue I had is to follow the simple procedure. Remove the battery and CMOS. Wait until the power is drained.
Then plug back everything and importantly, plug in the AC adapter. Wait until it figures out how to boot itself (if it stays off for long, press the power button).
The issue was indeed a clogged up NVRAM.
In case there’s a need for newer microcode, I opened the bios (1.40.0) with MCExtractor and it shows these:
Yes. UBU will update other microcodes that won’t apply, but no problem. The microcodes in UBU might not be the latest, but you can add newer ones without an issue.
I was really hoping you could get that laptop into physical service mode, but I read the reddit link you posted, and it wouldn’t apply to the 9570 anyway.
This was a great topic. Glad it worked out for you.
Thanks for the feedback, a clear CMOS procedure is indeed included in a standard flashing procedure.
Invalid entries are normal and normally just outdated, a new entry has been written, sometimes it’s kinda a chain with offset to next entry included, sometimes it’s managed just by the GUID