My attempt at Gigabyte EP45-DQ6 BIOS updating

JCLW · October 4, 2015, 4:51am

Hi,

Great forum with lots of information.

I have been working to update the Intel Raid and Realtek LAN modules in the latest Gigabyte EP45-DQ6 BIOS. The Intel AHCI module is already at 1.20E, the latest.
In addition I have attempted to remove the existing microcode and replace it with s775 Core2 together with s771 Xeon microcode.
Since both modules to be replaced were located below the MINIT module I used CBROM198 to first release the existing ICHARAID.BIN and RTEGROM.LOM and then add the new versions back in.
A straight replacement would result in two RTEGROM.LOM modules showing up which is why I chose the release and then add option.
CBROM195 was used to replace the microcode as CBROM198 would crash.
After the modifications I checked to make sure that MINIT stayed at the same offset (0003C000) which it did.
Everything looks pretty good to me but I was hoping someone else could have a quick look before I try and flash.
BIOSes attached. 13h is the original.

edit:
The OROMs used were:
- Intel RST 13.5.0.2164 w/TRIM mod
- Realtek v2.63 (confirmed DEV_8168)

edit:
- Modified BIOS deleted because I’m not sure it would work - new version below…

ep45dq6.13h.rar (567 KB)

Fernando · October 4, 2015, 9:32am

@ JCLW:
Welcome at Win-RAID Forum!

WHich sort of RAID system do you have?

Why did you insert into your P45 Chipset mainboard BIOS an Intel RAID ROM module, which has been designed by Intel for the latest Chipsets from 8-Series up?
According to my knowledge the TRIM modded Intel RAID ROM v11.2.0.1527 would have been the better choice.

This is what the tool CBROM32_198 shows after having opened both BIOS files (left picture: original BIOS, right picture: your modded BIOS):

My comment:
1. The updates of the Intel RAID ROM and Realtek LAN ROM seems to be fine (no wonder, since both original modules have been beyond the sensitive MINIT module).
2. I am unsure regarding the update of the CPU Microcode, because the size of the NCPUCODE.BIN has been reduced from 130 KB to 76 KB.

Regards
Dieter (alias Fernando)

JCLW · October 4, 2015, 4:00pm

Thanks Fernando,

Currently RAID 1, although if all this is successful I would be looking to add a RAID 0 array and possibly migrate the RAID 1 array into a RAID 5 array.

Only with the (probably incorrect) thought that newer would be better - I have seen other people updating ICH10R board BIOSes with v12.X and v13.X modules. Is the recommendation to use a v11.X module based on stability/compatibility concerns or because of performance?

The original microcode file covered all s775 chips ever made - both P4 and Core based. The new microcode file contains only the s775 Core microcode plus the s771 Xeon microcode - the s775 P4 microcode is no longer present.

I did it by following this guide (method 1): http://www.delidded.com/how-to-update-cp…r-phoenix-bios/ using the "Desktop LGA 771 and LGA 775 microcode (76 KB)" file provided on that page.

My other option was to try and merge the two files (since space does not appear to be an issue in this BIOS) but I have not yet worked out how to do this yet. I promised I’d take the kids for a bike ride but later today I’ll spend some more time reading the "CPU Microcode BIOS modding questions/problems" thread.

edit: I’ve attached a comparison of the microcodes

Yellow indicates the same microcode exists in both
Green/Red indicates newer microcode exists in one (green indicates newer)
Blue indicates microcode that only exists in one

Fernando · October 4, 2015, 6:38pm

Only with the (probably incorrect) thought that newer would be better

You are not the only user, who believes that.

It is based on both (stability and performance), if you use it in combination with the matching Intel RST driver v11.2.0.1006.

JCLW · October 7, 2015, 5:18am

Attached is my 2nd attempt.

Updated modules:
- Intel v8.0.0.1039 -> v11.2.0.1527 with TRIM mod
- Realtek v2.26 -> v2.63

I had to first release the two modules before adding them back to prevent a duplicate, same as my first attempt.

All modifications done below MINIT.

Original microcode was updated to latest where available, and s771 Core based Xeon microcode added (no P4 based microcode).

The steps I followed to edit the microcode:
- create an empty NCPUCODE.BIN file
- CBROM195 <BIOS.ROM> /nc_cpucode NCPUCODE.BIN
- use Intel Microcode List v0.4a to find individual microcode offsets within NCPUCODE.BIN
- download latest microcode package from Intel
- extract individual microcode from Intel download using Intel MicroDecode
- edit the microcode in NCPUCODE.BIN using a hex editor
- use Intel Microcode List v0.4a to make sure everything looks good within NCPUCODE.BIN
- mark NCPUCODE.BIN as read only
- CBROM195 <BIOS.ROM> /nc_cpucode NCPUCODE.BIN
- check final result using Intel Microcode List v0.4a on <BIOS.ROM>

result:

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cbrom198 V1.98 [08/27/08] (C)Phoenix Technologies 2001-2008
 
              ********  ep45dq6.13h BIOS component ********
 
 No. Item-Name         Original-Size   Compressed-Size Original-File-Name 
================================================================================
  0. System BIOS       20000h(128.00K)14511h(81.27K)tt.BIN
  1. XGROUP CODE       0EF30h(59.80K)0A248h(40.57K)awardext.rom
  2. ACPI table        04E2Ah(19.54K)019D6h(6.46K)ACPITBL.BIN
  3. EPA LOGO          0168Ch(5.64K)0030Dh(0.76K)AwardBmp.bmp
  4. GROUP ROM[18]     04EC0h(19.69K)03506h(13.26K)ggroup.bin
  5. GROUP ROM[20]     02FD0h(11.95K)022FBh(8.75K)ffgroup.bin
  6. YGROUP ROM        0DDC0h(55.44K)072E1h(28.72K)awardeyt.rom
  7. GROUP ROM[22]     0F630h(61.55K)015D9h(5.46K)tgroup.bin
  8. GROUP ROM[23]     0F630h(61.55K)02AC1h(10.69K)t1group.bin
  9. GROUP ROM[24]     0F630h(61.55K)00BB5h(2.93K)t2group.bin
 10. GROUP ROM[ 0]     091B0h(36.42K)033B4h(12.93K)_EN_CODE.BIN
 11. PCI ROM[A]        04000h(16.00K)02B45h(10.82K)ICHAAHCI.BIN
 12. PCI ROM[B]        07C00h(31.00K)045B6h(17.43K)jmb10678.bin
 13. MINIT             147C0h(81.94K)147F5h(81.99K)DQ6_DDR2.BIN
 14. LOGO1 ROM         00B64h(2.85K)00520h(1.28K)dbios.bmp
 15. LOGO BitMap       4B30Ch(300.76K)14B29h(82.79K)des_dq6.bmp
 16. OEM5 CODE         01132h(4.30K)009B0h(2.42K)TPMMPDRV.ROM
 17. GROUP ROM[21]     00050h(0.08K)00078h(0.12K)TCGSMI32.BIN
 18. GV3                0234Dh(8.83K)00C31h(3.05K)PPMINIT.ROM
 19. OEM0 CODE         03006h(12.01K)022A6h(8.66K)SBF.BIN
 20. NoCompress ROM    11000h(68.00K)1102Eh(68.04K)UTS64K.BIN
 21. PCI ROM[C]        1DC00h(119.00K)10EE1h(67.72K)ICHARAID.BIN
 22. PCI ROM[D]        0E000h(56.00K)07A0Fh(30.51K)RTEGROM.LOM
(SP) NCPUCODE          27800h(158.00K)27800h(158.00K)NCPUCODE.BIN
 
  Total compress code space  = E5000h(916.00K)
  Total compressed code size = BA297h(744.65K)
  Remain compress code space = 2AD89h(171.38K)
 
              ********  ep45dq6.13h Bootblock component ********
 
 No. Item-Name         Original-Size   Compressed-Size Original-File-Name 
================================================================================
  1. MEM INIT IN BB    07960h(30.34K)07991h(30.39K)DDR2_BB.BIN
 
                          ** Micro Code Information **
Update ID  CPUID  | Update ID  CPUID   | Update ID  CPUID   | Update ID  CPUID  
------------------+--------------------+--------------------+-------------------
SLOT1  0A 00000F32| SLOT1  02 00000F37| SLOT1  17 00000F34| PGA423 2C 00000F25
SLOT1  17 00000F41| SLOT1  05 00000F43| SLOT1  03 00000F49| SLOT1  04 00000F4A
SLOT1  06 00000F44| SLOT1  03 00000F47| PGA478 07 00000F61| PGA478 0F 00000F62
SLOT1  04 00000F64| PGA478 0B 00000F65| SLOT1  11 000006F1| SLOT1  26 000006F4
SLOT1  33 000006F5| SLOT1  33 000006F5| SLOT1  D0 000006F6| PPGA   6A 000006F7
SLOT1  04 00010660| SLOT1  5D 000006F2| SLOT1  82 000006F9| SLOT1  43 00010661
SLOT1  BA 000006FB| SLOT1  A4 000006FD| PPGA   BA 000006FB| SLOT1  06 00010671
SLOT1  04 00010674| SLOT1  0F 00010676| SLOT1  0B 0001067A| PPGA   06 00010671
PPGA   04 00010674| PPGA   0F 00010676| SLOT1  0B 0001067A| SLOT2  D2 000006F6
SLOT1  6B 000006F7| SLOT2  BC 000006FB| SLOT1  BC 000006FB| SLOT2  0F 00010676
SLOT1  0F 00010676| PPGA   0A 00010677|

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Intel Microcode List ver0.4a
 
CPUID=F37 Rev=02 2003/12/09 CRC=2B57BD9E Off=BD7E0 Size=800 Plat=0,2,3
CPUID=F34 Rev=17 2005/04/21 CRC=2CBD6146 Off=BDFE0 Size=1C00 Plat=0,2,3,4
CPUID=F25 Rev=2C 2004/08/26 CRC=62D062AB Off=BFBE0 Size=800 Plat=4
CPUID=F41 Rev=17 2005/04/22 CRC=326135C1 Off=C03E0 Size=1400 Plat=0,2,3,4,5,7
CPUID=F43 Rev=05 2005/04/21 CRC=77812C17 Off=C17E0 Size=800 Plat=0,2,3,4,7
CPUID=F49 Rev=03 2005/04/21 CRC=F85D53B8 Off=C1FE0 Size=800 Plat=0,2,3,4,5,7
CPUID=F4A Rev=04 2005/12/14 CRC=5E7996D9 Off=C27E0 Size=800 Plat=2,3,4,6
CPUID=F44 Rev=06 2005/04/21 CRC=9F60DB18 Off=C2FE0 Size=C00 Plat=0,2,3,4,7
CPUID=F47 Rev=03 2005/04/21 CRC=AF2CEF0D Off=C3BE0 Size=C00 Plat=0,2,3,4,7
CPUID=F61 Rev=07 2005/06/10 CRC=AB7DD242 Off=C47E0 Size=800 Plat=2
CPUID=F62 Rev=0F 2005/12/15 CRC=0976D137 Off=C4FE0 Size=C00 Plat=2
CPUID=F64 Rev=04 2005/12/23 CRC=C66DBF02 Off=C5BE0 Size=C00 Plat=2,4,5
CPUID=F65 Rev=0B 2007/05/10 CRC=69B15BBA Off=C67E0 Size=800 Plat=2
CPUID=6F1 Rev=11 2005/10/10 CRC=A28ACD13 Off=C6FE0 Size=1000 Plat=0,1,2,5
CPUID=6F4 Rev=26 2006/03/12 CRC=DA8E97D1 Off=C7FE0 Size=1000 Plat=0,2,4,5,6,7
CPUID=6F5 Rev=33 2006/05/01 CRC=6A962F22 Off=C8FE0 Size=1000 Plat=0
CPUID=6F5 Rev=33 2006/05/01 CRC=6A962ED3 Off=C9FE0 Size=1000 Plat=4,6
CPUID=6F6 Rev=D0 2010/09/30 CRC=B61EC71A Off=CAFE0 Size=1000 Plat=0
CPUID=6F7 Rev=6A 2010/10/02 CRC=9911AAF2 Off=CBFE0 Size=1000 Plat=4
CPUID=10660 Rev=04 2006/06/12 CRC=6CC60901 Off=CCFE0 Size=1000 Plat=0,1
CPUID=6F2 Rev=5D 2010/10/02 CRC=9384A573 Off=CDFE0 Size=1000 Plat=0
CPUID=6F9 Rev=82 2006/09/03 CRC=59C9FE00 Off=CEFE0 Size=1000 Plat=0
CPUID=10661 Rev=43 2010/10/04 CRC=4B64BA3A Off=CFFE0 Size=1000 Plat=0
CPUID=6FB Rev=BA 2010/10/03 CRC=08707B60 Off=D0FE0 Size=1000 Plat=0
CPUID=6FD Rev=A4 2010/10/02 CRC=9ACE6116 Off=D1FE0 Size=1000 Plat=0
CPUID=6FB Rev=BA 2010/10/03 CRC=ED247070 Off=D2FE0 Size=1000 Plat=4
CPUID=10671 Rev=106 2007/03/29 CRC=80731BAC Off=D3FE0 Size=1000 Plat=0
CPUID=10674 Rev=404 2007/06/08 CRC=F9DEC4C0 Off=D4FE0 Size=1000 Plat=0
CPUID=10676 Rev=60F 2010/09/29 CRC=8FE1A246 Off=D5FE0 Size=1000 Plat=0
CPUID=1067A Rev=A0B 2010/09/28 CRC=B007E7E3 Off=D6FE0 Size=2000 Plat=0,4
CPUID=10671 Rev=106 2007/03/29 CRC=80731B9D Off=D8FE0 Size=1000 Plat=4
CPUID=10674 Rev=404 2007/06/08 CRC=F9DEC4B1 Off=D9FE0 Size=1000 Plat=4
CPUID=10676 Rev=60F 2010/09/29 CRC=8FE1A237 Off=DAFE0 Size=1000 Plat=4
CPUID=1067A Rev=A0B 2010/09/28 CRC=B007E7B0 Off=DBFE0 Size=2000 Plat=2,6
CPUID=6F6 Rev=D2 2010/10/01 CRC=6618CFFF Off=DDFE0 Size=1000 Plat=2
CPUID=6F7 Rev=6B 2010/10/02 CRC=CC4DEED3 Off=DEFE0 Size=1000 Plat=6
CPUID=6FB Rev=BC 2010/10/03 CRC=9394765A Off=DFFE0 Size=1000 Plat=2
CPUID=6FB Rev=BC 2010/10/03 CRC=F1A7A484 Off=E0FE0 Size=1000 Plat=6
CPUID=10676 Rev=60F 2010/09/29 CRC=8FE1A243 Off=E1FE0 Size=1000 Plat=2
CPUID=10676 Rev=60F 2010/09/29 CRC=8FE1A207 Off=E2FE0 Size=1000 Plat=6
CPUID=10677 Rev=70A 2010/09/29 CRC=F3710DB6 Off=E3FE0 Size=1000 Plat=4
CPUID=F32 Rev=0A 2004/05/11 CRC=2538EF0A Off=EF000 Size=800 Plat=0,2,3

Any obvious mistakes before I try flashing?

EDIT by Fernando: Put the Code details into a spoiler (to save space)

ep45dq6.13h.v2.rar (604 KB)

Fernando · October 7, 2015, 11:32am

Since I have never tried to update the CPU Microcode of a non-UEFI BIOS, I cannot give you any comment regarding this point.
The update of the Intel RAID ROM and Intel LAN ROM should work (provided, that the BIOS is able to load a >100 KB sized Intel RAID ROM module).

JCLW · October 9, 2015, 4:44am

Works perfectly,

Didn’t even break my RAID array when I flashed it. After updating all my BIOS settings it just booted right into Windows.

Thanks for your help and support.

Now to search eBay for a suitable s771 Xeon…

edit: In case anyone else is interested the final version (v2) consists of:

Based on Gigabyte 13h Beta:
- Intel vAHCI 1.20E
- JMicron v1.06.78
- Intel RAID v11.2.0.1527
- Relatek v2.63

Should contain microcode for all s775 NetBurst & Core based CPUs, plus s771 Core based Xeons.

Nian · February 23, 2016, 1:20pm

Just resurrecting an old thread.

Wondering how this BIOS of yours went, any problems? I and two of my friends all have this motherboard, almost upgraded to the brim, but we lacked trim and >2TB. Oh and no optical driver support for the JMicron ports.

Did you manage to get those going? It is stable? I’m super happy finding out that you did a modified bios for this board.

thevoiceover · April 11, 2016, 9:05am

I have this motherboard and I can say from recent (well finally figured it out) experience is that the F13 branch of BIOS breaks the S3 sleep (especially in windows and other DSDT based OS’s I have tried) and the F12 version runs ok with sleep. I flashed a F13h version and the same sleep issues I experienced in F13d were still there, but F12 didn’t have them (not waking correctly from sleep, infinite reboots, etc…) The F12 build on Gigabytes website even states that F12 "Fixed Vista S3 resume sometimes failed" and it does for me, Windows 10 resumes with no issues and when I flash F13*, I get constant sleep / S3 issues with it…

For this I would say the perfect BIOS in my opinion would be all of the above additions, added to the F12 BIOS !!!

thevoiceover · April 11, 2016, 11:51pm

Ok, I was going to attempt to do this myself as I do not think it is going to get touched again but am doubting myself and looking for some ideas. As I think I mentioned before I am on some pretty rough cycles of Chemo now and “not all there” but I hope it doesn’t get in my way.

I was wanting to mod the F12 BIOS as it doesn’t have the sleep issues that I am encountering consistently on the F13* builds. I am fine with the microcode in the device as it supports my current Q6600 and my soon to be E5450 Xeon, so I am not touching that. Where I am lost is the AHCI portion, the F12 only has 1.07 and the F13 has 1.20, but from what it sounds like it is the ICHAACHI.BIN file I will need to update to get it to 1.20E (right?) but you guys have mentioned things being above or below the sensitive MINIT module, well this file happens to be above it. What does this mean in my situation? Is it possible and what precautions should I take to not tamper with it? Am I out of luck trying to getting BIOS F12 modded with latest drivers?

-updated, this got me thinking… More than likely the S3 fixes for resume were done via DSDT (ACPI) - I think the F13 version of the ACPITBL.BIN is actually older than the version that is in F12 that is stated to fix S3 resume issues,do you guys think replacing the ACPITBL.BIN file in the F13* version here with the F12 one would fix those resume issues I was having? Should the tables (ACPITBL.BIN) them-self cause any crashes if I replace it alone and it is an older version from F12?

Ok, could someone please update the 13h version 2 file / BIOS in this thread post # 5 (Please make sure it is the second one) to contain this file, the old ACPITBL.BIN from version F12 and keep that file in the second position? I am having a hell of a time doing this… Thank you for the time, it would be much appreciated!!

ACPITBL - compressed.zip (6.53 KB)

thevoiceover · April 12, 2016, 11:27pm

For what it is worth (Again I have no idea if anyone even watches this thread anymore but it doesn’t seem like it!) I think I may have figured out what is causing the F13 versions to not handle sleep correctly over the F12 version. I compared the two versions and found a few differences but the one that stood out most was in the _WAK method. The F12 had a “Return (Package (0x02)” at the end and the F13 versions didn’t.

F12 version:

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Method (_WAK, 1, NotSerialized)
    {
        Store (0xFF, DBG1)
        If (LEqual (Arg0, 0x03))
        {
            Store (0x8F, SCP)
        }
 
        If (LEqual (Arg0, 0x04))
        {
            If (LEqual (OSFL, Zero))
            {
                If (LEqual (OSFX, 0x03))
                {
                    Store (0x59, SMIP)
                }
                Else
                {
                    Store (0x58, SMIP)
                }
            }
 
            If (LEqual (OSFL, One))
            {
                Store (0x56, SMIP)
            }
 
            If (LEqual (OSFL, 0x02))
            {
                Store (0x57, SMIP)
            }
 
            If (LEqual (OSFX, 0x03))
            {
                Store (0x59, SMIP)
            }
        }
 
        If (LEqual (Arg0, One)) {}
        If (OSFL)
        {
            Notify (\_SB.PWRB, 0x02)
        }
        Else
        {
            If (LEqual (RTCW, Zero))
            {
                Notify (\_SB.PWRB, 0x02)
            }
        }
 
        Notify (\_SB.PCI0.USB0, Zero)
        Notify (\_SB.PCI0.USB1, Zero)
        Notify (\_SB.PCI0.USB2, Zero)
        Notify (\_SB.PCI0.USB3, Zero)
        Notify (\_SB.PCI0.USB4, Zero)
        Notify (\_SB.PCI0.USB5, Zero)
        Return (Package (0x02)
        {
            Zero, 
            Zero
        })
    }

F13 Version:

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Method (\_WAK, 1, NotSerialized)
    {
        Store (0xFF, DBG1)
        If (LEqual (Arg0, 0x03))
        {
            Store (0x8F, SCP)
        }
 
        If (LEqual (Arg0, 0x04))
        {
            If (LEqual (OSFL, 0x00))
            {
                If (LEqual (OSFX, 0x03))
                {
                    Store (0x59, SMIP)
                }
                Else
                {
                    Store (0x58, SMIP)
                }
            }
 
            If (LEqual (OSFL, 0x01))
            {
                Store (0x56, SMIP)
            }
 
            If (LEqual (OSFL, 0x02))
            {
                Store (0x57, SMIP)
            }
 
            If (LEqual (OSFX, 0x03))
            {
                Store (0x59, SMIP)
            }
        }
 
        If (LEqual (Arg0, 0x01)) {}
        If (OSFL)
        {
            Notify (\_SB.PWRB, 0x02)
        }
        Else
        {
            If (LEqual (RTCW, 0x00))
            {
                Notify (\_SB.PWRB, 0x02)
            }
        }
 
        Notify (\_SB.PCI0.USB0, 0x00)
        Notify (\_SB.PCI0.USB1, 0x00)
        Notify (\_SB.PCI0.USB2, 0x00)
        Notify (\_SB.PCI0.USB3, 0x00)
        Notify (\_SB.PCI0.USB4, 0x00)
        Notify (\_SB.PCI0.USB5, 0x00)
    }

I'm still not getting how to mod my BIOS though :(

EDIT by Fernando: Put both codes into a spoiler (to save space and for better readability)

Fernando · April 13, 2016, 1:23am

As you can see, I am watching this thread, but unfortunately I am not able to help you regarding your special BIOS problem.

JCLW · April 27, 2016, 4:52am

Yes, I ended up finding a s771 Xeon L5430 for the board. It has been working perfectly 24/7 since I flashed the new BIOS.

I don’t use the JMicron controller so I can’t comment on that.

JCLW · April 27, 2016, 5:18am

Modifying modules above the memory initialisation module is tricky, because the memory initialisation module must remain at the same offset within the BIOS file.

How do the compressed sizes of the ACPI Table modules compare between F12 and F13?

peshocom · January 9, 2017, 10:21am

Many thanks to Fernando and JCLW
Bios upgraded to a ep45dq6.13h.v2 file. Problem> 2TB solve. But the menu CTRL-I there is no option raid 5. The only option Raid 0. In the Windows and iRST 15.2.0.1020 seen correctly. I decided to delete volume and create a new volume area. the program had all the options: Raid 0,1,5,10. I chose the option: Raid 5 and create normal. but not allowed to create name volume. and not allowed to change name. Is it normal and stable you will?

peshocom · January 9, 2017, 10:24am

Is it normal and stable you will is ok? Reboot and in the "Ctrl-I" it appears normal. On "S3 sleep" with Windows 7 x86 I had no problem, but x64 does not sleep. regardless of BIOS f13d old and new modified 13h.v2

Fernando · January 9, 2017, 12:03pm

@peshocom :
Welcome at Win-RAID Forum!
Here are my comments:

It was a big mistake to update the Intel RAID ROM to v15.2.0.1020.
The latest Intel RAID ROM version, which fully supports your old Intel P45 Chipset system, is v11.2.0.1527.
The best matching Intel RST RAID driver would be v11.2.0.1006 WHQL (Warning: Don’t try to downgrade the Intel RAID driver version, if the RAID array is the system drive!)).
If you want to optimize the performance of your Intel RAID array, you should enable the Write-Back Caching from within the Intel RST Console v11.2.0.1006.

Regards
Dieter (alias Fernando)

peshocom · January 10, 2017, 1:39pm

It’s my Raid ROM from Bios file JCLW:

Where can I download The best matching Intel RST RAID driver v11.2.0.1006 WHQL? Not the RAID array is the system drive! Is the data backup drive!
My question is: with this version of Raid ROM menu only option Raid 0. I need Raid 5 ? It was once optional ,how created it from the console?
Many thanks in advance!

EDIT by Fernando: Unneeded parts of the fully quoted posts removed (to save space)

peshocom · January 11, 2017, 1:52pm

now it fulfilled, as recommended.

why those options are not active? if we delete the volume of Raid 5, I will have the option in this configuration to create raid5 again or will I just Raid 0?

EDIT by Fernando: Unneeded parts of the fully quoted post removed (to save space)

Fernando · January 11, 2017, 3:47pm

Which options do you mean?

Your RAID5 array should still be healthy.
Have you uninstalled the previously running version of the Intel Rapid Storage Technology from within the Control Panel ("Add/Remove Programs") before you "downgraded" the RAID driver version?
If yes, did you install the complete Intel RST Drivers & Software Set v11.2.0.1006 or just the RAID driver?