[Aptio IV] How to change default setting in SbPlatformdata: currently only referred as Checkbox in Setup IFR?

BIOS/UEFI Modding BIOS Modding Guides and Problems
1

I got an issue with my PCIe bus settings after unlocking Chipset menu on my Asrock-Rack C226WS; it insists that “PCIE Port 1 is assigned to LAN” which is wrong, it should be port 3.

VarStore list for Chipset:

0x74401 Form Set: Chipset [ADFE34C8-9AE1-4F8F-BE13-CF96A2CB2C5B], ClassGuid0 [93039971-8545-4B04-B45E-32EB8326040E] {0E A7 C8 34 FE AD E1 9A 8F 4F BE 13 CF 96 A2 CB 2C 5B 1F 00 20 00 01 71 99 03 93 45 85 04 4B B4 5E 32 EB 83 26 04 0E}
0x74428 Guid: [0F0B1735-87A0-4193-B266-538C38AF48CE] {5F 15 35 17 0B 0F A0 87 93 41 B2 66 53 8C 38 AF 48 CE 03 20 00}
0x7443D Guid: [0F0B1735-87A0-4193-B266-538C38AF48CE] {5F 15 35 17 0B 0F A0 87 93 41 B2 66 53 8C 38 AF 48 CE 04 00 00}
0x74452 Default Store: , DefaultId: 0x0 {5C 06 00 00 00 00}
0x74458 VarStore: VarStoreId: 0x1 [EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9], Size: 0x50C, Name: Setup {24 1C 43 D6 87 EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 01 00 0C 05 53 65 74 75 70 00}
0x74474 VarStore: VarStoreId: 0x2 [E770BB69-BCB4-4D04-9E97-23FF9456FEAC], Size: 0x1, Name: SystemAccess {24 23 69 BB 70 E7 B4 BC 04 4D 9E 97 23 FF 94 56 FE AC 02 00 01 00 53 79 73 74 65 6D 41 63 63 65 73 73 00}
0x74497 VarStore: VarStoreId: 0x3 [9CF0F18E-7C7D-49DE-B5AA-BBBAD6B21007], Size: 0x2, Name: AMICallback {24 22 8E F1 F0 9C 7D 7C DE 49 B5 AA BB BA D6 B2 10 07 03 00 02 00 41 4D 49 43 61 6C 6C 62 61 63 6B 00}
0x744B9 VarStore: VarStoreId: 0x4 [EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9], Size: 0x10, Name: SetupPlatformData {24 28 43 D6 87 EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 04 00 10 00 53 65 74 75 70 50 6C 61 74 66 6F 72 6D 44 61 74 61 00}
0x744E1 VarStore: VarStoreId: 0x5 [EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9], Size: 0xC, Name: SbPlatformData {24 25 43 D6 87 EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 05 00 0C 00 53 62 50 6C 61 74 66 6F 72 6D 44 61 74 61 00}
0x74506 VarStore: VarStoreId: 0x6 [EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9], Size: 0x14, Name: NBPlatformData {24 25 43 D6 87 EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 06 00 14 00 4E 42 50 6C 61 74 66 6F 72 6D 44 61 74 61 00}
0x7452B VarStore: VarStoreId: 0x7 [EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9], Size: 0x2, Name: UsbMassDevNum {24 24 43 D6 87 EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 07 00 02 00 55 73 62 4D 61 73 73 44 65 76 4E 75 6D 00}
0x7454F VarStore: VarStoreId: 0x8 [EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9], Size: 0x10, Name: UsbMassDevValid {24 26 43 D6 87 EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 08 00 10 00 55 73 62 4D 61 73 73 44 65 76 56 61 6C 69 64 00}
0x74575 VarStore: VarStoreId: 0x9 [EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9], Size: 0x22, Name: UsbSupport {24 21 43 D6 87 EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 09 00 22 00 55 73 62 53 75 70 70 6F 72 74 00}
0x74596 VarStore: VarStoreId: 0xA [560BF58A-1E0D-4D7E-953F-2980A261E031], Size: 0x1, Name: SerialPortsEnabledVar {24 2C 8A F5 0B 56 0D 1E 7E 4D 95 3F 29 80 A2 61 E0 31 0A 00 01 00 53 65 72 69 61 6C 50 6F 72 74 73 45 6E 61 62 6C 65 64 56 61 72 00}
0x745C2 VarStore: VarStoreId: 0xB [97CA1A5B-B760-4D1F-A54B-D19092032C90], Size: 0x1, Name: DebuggerSerialPortsEnabledVar {24 34 5B 1A CA 97 60 B7 1F 4D A5 4B D1 90 92 03 2C 90 0B 00 01 00 44 65 62 75 67 67 65 72 53 65 72 69 61 6C 50 6F 72 74 73 45 6E 61 62 6C 65 64 56 61 72 00}

Relevant menu part:
0x76DEE Suppress If {0A 82}
0x76DF0 QuestionId: 0x269 equals value 0x0 {12 06 69 02 00 00}
0x76DF6 Ref: PCI Express Root Port 1, VarStoreInfo (VarOffset/VarName): 0xFFFF, VarStore: 0x0, QuestionId: 0x82, FormId: 0x43A {0F 0F E1 02 E2 02 82 00 00 00 FF FF 00 3A 04}
0x76E05 End If {29 02}
0x76E07 Suppress If {0A 82}
0x76E09 QuestionId: 0x269 equals value 0x0 {12 86 69 02 00 00}
0x76E0F Not {17 02}
0x76E11 End {29 02}
0x76E13 Text: Statement.Prompt: PCIE Port 1 is assigned to LAN, TextTwo: {03 08 0E 03 83 04 83 04}
0x76E1B End If {29 02}
0x76E1D Suppress If {0A 82}
0x76E1F QuestionId: 0x8A equals value 0x0 {12 86 8A 00 00 00}
0x76E25 QuestionId: 0x269 equals value 0x1 {12 06 69 02 01 00}
0x76E2B Or {16 02}
0x76E2D End {29 02}
0x76E2F Ref: PCI Express Root Port 2, VarStoreInfo (VarOffset/VarName): 0xFFFF, VarStore: 0x0, QuestionId: 0x83, FormId: 0x43B {0F 0F E3 02 E4 02 83 00 00 00 FF FF 00 3B 04}
0x76E3E End If {29 02}
0x76E40 Suppress If {0A 82}
0x76E42 QuestionId: 0x8A equals value 0x0 {12 86 8A 00 00 00}
0x76E48 QuestionId: 0x269 equals value 0x1 {12 06 69 02 01 00}
0x76E4E Not {17 02}
0x76E50 Or {16 02}
0x76E52 End {29 02}
0x76E54 Text: Statement.Prompt: PCIE Port 2 is assigned to LAN, TextTwo: {03 08 0F 03 83 04 83 04}
0x76E5C End If {29 02}
0x76E5E Suppress If {0A 82}
0x76E60 QuestionId: 0x8A equals value 0x0 {12 86 8A 00 00 00}
0x76E66 QuestionId: 0x269 equals value 0x2 {12 06 69 02 02 00}
0x76E6C Or {16 02}
0x76E6E End {29 02}
0x76E70 Ref: PCI Express Root Port 3, VarStoreInfo (VarOffset/VarName): 0xFFFF, VarStore: 0x0, QuestionId: 0x84, FormId: 0x43C {0F 0F E5 02 E6 02 84 00 00 00 FF FF 00 3C 04}
0x76E7F End If {29 02}
0x76E81 Suppress If {0A 82}
0x76E83 QuestionId: 0x8A equals value 0x0 {12 86 8A 00 00 00}
0x76E89 QuestionId: 0x269 equals value 0x2 {12 06 69 02 02 00}
0x76E8F Not {17 02}
0x76E91 Or {16 02}
0x76E93 End {29 02}
0x76E95 Text: Statement.Prompt: PCIE Port 3 is assigned to LAN, TextTwo: {03 08 10 03 83 04 83 04}
0x76E9D End If {29 02}

And at the end of Chipset section I can find the QuestionId I believe I need to change as a checkbox.

0x80538 Disable If {1E 82}
0x8053A True {46 02}
0x8053C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x0, VarStore: 0x2, QuestionId: 0x25D {06 8E 00 00 00 00 5D 02 02 00 00 00 00 00}
0x8054A End {29 02}
0x8054C Checkbox: , VarStoreInfo (VarOffset/VarName): 0xD, VarStore: 0x6, QuestionId: 0x25E {06 8E 00 00 00 00 5E 02 06 00 0D 00 00 00}
0x8055A End {29 02}
0x8055C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x9, VarStore: 0x6, QuestionId: 0x25F {06 8E 00 00 00 00 5F 02 06 00 09 00 00 00}
0x8056A End {29 02}
0x8056C Checkbox: , VarStoreInfo (VarOffset/VarName): 0xA, VarStore: 0x6, QuestionId: 0x260 {06 8E 00 00 00 00 60 02 06 00 0A 00 00 00}
0x8057A End {29 02}
0x8057C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x5, VarStore: 0x6, QuestionId: 0x261 {06 8E 00 00 00 00 61 02 06 00 05 00 00 00}
0x8058A End {29 02}
0x8058C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x4, VarStore: 0x6, QuestionId: 0x262 {06 8E 00 00 00 00 62 02 06 00 04 00 00 00}
0x8059A End {29 02}
0x8059C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x4BC, VarStore: 0x1, QuestionId: 0x263 {06 8E 00 00 00 00 63 02 01 00 BC 04 00 00}
0x805AA End {29 02}
0x805AC Checkbox: , VarStoreInfo (VarOffset/VarName): 0x4C0, VarStore: 0x1, QuestionId: 0x264 {06 8E 00 00 00 00 64 02 01 00 C0 04 00 00}
0x805BA End {29 02}
0x805BC Checkbox: , VarStoreInfo (VarOffset/VarName): 0x7, VarStore: 0x6, QuestionId: 0x265 {06 8E 00 00 00 00 65 02 06 00 07 00 00 00}
0x805CA End {29 02}
0x805CC Checkbox: , VarStoreInfo (VarOffset/VarName): 0x6, VarStore: 0x6, QuestionId: 0x266 {06 8E 00 00 00 00 66 02 06 00 06 00 00 00}
0x805DA End {29 02}
0x805DC Checkbox: , VarStoreInfo (VarOffset/VarName): 0x8, VarStore: 0x6, QuestionId: 0x267 {06 8E 00 00 00 00 67 02 06 00 08 00 00 00}
0x805EA End {29 02}
0x805EC Checkbox: , VarStoreInfo (VarOffset/VarName): 0x1, VarStore: 0x1, QuestionId: 0x268 {06 8E 00 00 00 00 68 02 01 00 01 00 00 00}
0x805FA End {29 02}
0x805FC Checkbox: , VarStoreInfo (VarOffset/VarName): 0x1, VarStore: 0x5, QuestionId: 0x269 {06 8E 00 00 00 00 69 02 05 00 01 00 00 00}
0x8060A End {29 02}
0x8060C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x4, VarStore: 0x5, QuestionId: 0x26A {06 8E 00 00 00 00 6A 02 05 00 04 00 00 00}
0x8061A End {29 02}
0x8061C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x2, VarStore: 0x5, QuestionId: 0x26B {06 8E 00 00 00 00 6B 02 05 00 02 00 00 00}
0x8062A End {29 02}
0x8062C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x227, VarStore: 0x1, QuestionId: 0x26C {06 8E 00 00 00 00 6C 02 01 00 27 02 00 00}
0x8063A End {29 02}
0x8063C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x226, VarStore: 0x1, QuestionId: 0x26D {06 8E 00 00 00 00 6D 02 01 00 26 02 00 00}
0x8064A End {29 02}
0x8064C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x2EC, VarStore: 0x1, QuestionId: 0x26E {06 8E 00 00 00 00 6E 02 01 00 EC 02 00 00}
0x8065A End {29 02}
0x8065C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x4E, VarStore: 0x1, QuestionId: 0x26F {06 8E 00 00 00 00 6F 02 01 00 4E 00 00 00}
0x8066A End {29 02}
0x8066C Checkbox: , VarStoreInfo (VarOffset/VarName): 0x5, VarStore: 0x5, QuestionId: 0x270 {06 8E 00 00 00 00 70 02 05 00 05 00 00 00}
0x8067A End {29 02}
0x8067C End If {29 02}

I’ve tried editing SbPlatformData with ru.efi but my edit gets overwritten at reboot.
Please help, attaching original BIOS for reference.

Org_bios.zip (3.34 MB)

2

Did you verify you are correct in your thoughts, that LAN is not assigned to this PCIE port? I didn’t check your BIOS right now, but I remember seeing this in several BIOS, like 1-13 or something like that all say assigned to LAN
This is a textual thing, on many ports, you need to go inside this ports submenu to change the actual assigned thing.

Don’t use RU, use grub and setup_var instead. I went ahead and checked your BIOS, and yes, it’s similar to the others I was thinking of, all your ports 1-8 have this textual line assigned, but none have LAN or anything assigned inside their actual settings, except maybe reserved IO or bus
Why are you trying to change what the board is telling you is defaulted anyway? Changing this wont do anything except mess something up I’m sure. Actual port assignments like this can only be changed in the ME FW, then BIOS will reflect changes by changing the assigned ports. But again, I refer to the sentence before this one on changing it there too

3

@Lost_N_BIOS : I have checked with combination of PCI Scope and Hwinfo64. Also double-checked by turning off single PCIe-ports in BIOS and checking what disappeared, so I as sure as I can get.
Edit: I’m trying to change it because I need to change the settings on that port. The default settings that gets applied to port (after I unlocked Chipset Menu, not in original BIOS) makes the onboard Marvell SATA that is connected to that port throw WHEA errors.
Edit2: Specifically WHEA is not even on in original BIOS. After turning it on I got shitloads of errors, some due to old drivers, some due to bios settings that got applied when I unlocked menus. I got rid of all expect the from this card.
Edit3: And the Chipset menu is not configured for the board so what it is telling me is irrelevant. For example it shows the wrong “System Agent (SA) Configuration -> Graphics ConfigurationShare Memory” menu under graphics configuration of the two available, making the board choke completely on raboot after flash unless I specifically disable that option.

4

OK, thanks for clarification. If you’re sure, then I suggest making the change in grub/setup_var instead of RU. However, there is no setting to change that I see, in regards to actually making a change to a setting via setup/RU/IFR/Grub/setup_var.
You need to change the assignment in the ME FW with FITc. Check PCH Strap 4, it appears to be assigned to port 5 from what I see, or in strap 9 maybe assigned to port 4 or 1+2, you’ll have to look and see what you think.
FITc (Flash Image Tool) can be downloaded in this thread in section “C”, you need ME System Tools V9.1 - Intel Management Engine: Drivers, Firmware & System Tools

Changing this setting might help by itself too - PCIE Root Port Function Swapping, change to enabled.

5

@Lost_N_BIOS : Did test setting PCIE Root Port Function Swapping to enabled, nothing changed expect PCI Scope stopped working. Had to reinstall Windows after setting back to diabled to get it working again.
Gotta do some more research before I attack this again, but one question if you know: Will an edit to form set in Setup that changes the size of the form-set section brick my PC?

6

@h_celine - I am not sure what you mean on your last question there, please give an example of before/after edit in setup, or explain in more detail

7

@Lost_N_BIOS : Taking two random questions from IFR.txt as example:
Lets say I had no "Deep Sleep" option in BIOS, and somehow figured out that it should look like this if present:

1
2
3
4
5
6
 
One Of: Deep Sleep, VarStoreInfo (VarOffset/VarName): 0xA6, VarStore: 0x1, QuestionId: 0x79, Size: 1, Min: 0x0, Max 0x0, Step: 0x0 {05 A6 89 04 D7 02 79 00 01 00 A6 00 10 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00}
	One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 0E 87 04 30 00 00 00 00 00 00 00 00 00}
	One Of Option: Enabled in S5/Battery, Value (8 bit): 0x1 {09 0E DC 02 00 00 01 00 00 00 00 00 00 00}
	One Of Option: Enabled in S4-S5/Battery, Value (8 bit): 0x3 {09 0E DE 02 00 00 03 00 00 00 00 00 00 00}
	One Of Option: Enabled in S3-S4-S5/Battery, Value (8 bit): 0x5 {09 0E E0 02 00 00 05 00 00 00 00 00 00 00}
End One Of {29 02}
 

Then I decided I did not need the "Board Capability" option, and wanted to replace it with "Deep Sleep". "Board Capability" looks like this:
1
2
3
4
 
One Of: Board Capability, VarStoreInfo (VarOffset/VarName): 0xA5, VarStore: 0x1, QuestionId: 0x78, Size: 1, Min: 0x0, Max 0x0, Step: 0x0 {05 A6 D3 02 D4 02 78 00 01 00 A5 00 10 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00}
	One Of Option: SUS_PWR_DN_ACK, Value (8 bit): 0x0 (default) {09 0E D5 02 30 00 00 00 00 00 00 00 00 00}
	One Of Option: DeepSx, Value (8 bit): 0x1 {09 0E D6 02 00 00 01 00 00 00 00 00 00 00}
End One Of {29 02}
 

So I replace;
1
2
3
4
5
 
05 a6 d3 02 d4 02 78 00 01 00 a5 00 10 10 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 09 0e d5 02 30 00 00 00 00 00
00 00 00 00 09 0e d6 02 00 00 01 00 00 00 00 00
00 00 29 02
 

with;
1
2
3
4
5
6
 
05 a6 89 04 d7 02 79 00 01 00 a6 00 10 10 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 09 0e 87 04 30 00 00 00 00 00
00 00 00 00 09 0e dc 02 00 00 01 00 00 00 00 00
00 00 09 0e de 02 00 00 03 00 00 00 00 00 00 00
09 0e e0 02 00 00 05 00 00 00 00 00 00 00 29 02
 

in hex editor. This edit would make the form-set section longer than it was; will such an edit brick my PC?
8

@h_celine - Before answering above, at the main title question, I just came across “Checkbox” for a setting in a Gigabyte Z390 BIOS, only checkbox in IFR, but actual enabled/disabled for that same setting in AMIBCP. So where you ran into this, check the setting in AMIBCP too and see if you have actual settings.

To the above - yes, you can’t do that, for a few reasons. Main one is the size, changing size breaks the IFR output, thus the BIOS as well obviously.
ket and I tried many ways to figure out how to do this without breaking things, and we could not find solution. Even correcting file sizes in the header, or removing empty space towards end of file, all same, no luck and it breaks.

Second thing, you can’t blindly add something that isn’t there, due to varstore ID and QuestionID have to be valid and actually from the correct sources.
Same for VarStoreInfo (VarOffset/VarName) needs to be correct and not used already (if incorrect, sometimes you will get different setting or options instead, same with changing the option variable #'s)
Now, if you did find the correct ID’s for both of those and any given setting, you could try adding and see if IFR output then is still correct, that would work.
But, this would only work if you could add/swap in the changes using the exact same amount of valid data bytes at that location (ie may be possible, with less options inserted for the replacement settings, if ID’s are correct)

I am sure all of this can be done, exactly how you mentioned, once you know the correct ID’s for the settings you want to add, but I’ve not yet figured out how to increase or decrease settings within a given setup without breaking IFR output.
We tried many things, over several days, if you figure it out please let me know!