Intel, AMD, VIA & Freescale CPU Microcode Repositories Discussion

New official Intel microcode release just came out https://github.com/intel/Intel-Linux-Pro…rocode-20191112

I’ll attach what we don’t know already there:
!New_cpu406D8_plat01_ver0000012D_2019-09-16_PRD_12D03BC2.bin
!New_cpu50653_plat97_ver01000151_2019-09-09_PRD_F625EE88.bin
!New_cpu706E5_plat80_ver00000046_2019-09-05_PRD_06B0C922.bin

Intel-Linux-Processor-Microcode-Data-Files-microcode-20191112.zip (216 KB)

cpu406D8_plat01_ver0000012D_2019-09-16_PRD_12D03BC2 (>cpu406D8_plat01_ver0000012A_2018-01-04_PRD_7CACB989)
cpu50653_plat97_ver01000151_2019-09-09_PRD_F625EE88 (>cpu50653_plat97_ver01000146_2018-08-24_PRD_9F52DEC6)
cpu706E5_plat80_ver00000046_2019-09-05_PRD_06B0C922 (<cpu706E5_plat80_ver00000050_2019-10-27_PRD_A2FFC288)

From #321

mc.rar (216 KB)

Nothing new in Insider 19023…



So v02000065 for Skylake-X is back on then menu then, as it’s officially listed in the link above under "Updated Platforms". But Intel made a typo in that list and calls it 00000065.

@javanse
Yep, official now and identical file compared to previous posted here.

I am using debian as a Linux distro and from today’s updates there is an update to the microcode with this log:
== 3.20191112.1 ==
* New upstream microcode datafile 20191112 + SECURITY UPDATE - Implements MDS mitigation (TSX TAA), INTEL-SA-00270, CVE-2019-11135 - Implements TA Indirect Sharing mitigation, and improves the MDS mitigation (VERW) - Fixes FIVR (Xeon Voltage Modulation) vulnerability, INTEL-SA-00271, CVE-2019-11139 - Fixes SGX vulnerabilities and errata (including CVE-2019-0117) + CRITICAL WRONG FIXES - Fixes Jcc conditional jump macro-fusion erratum (Skylake +, except Ice Lake), causes a 0-3% typical perforance hit (can be as bad as 10%). But it does not even dream of not applying this fix. - Fixes AVX SHUF * instruction implementation flaw erratum + Removed Microcodes: sig 0x000906ec, pfmask 0x22, 2019-02-14, rev 0x00ae, size 98304 + New Microcodes: sig 0x000406d8, pfmask 0x01, 2019-09-16, rev 0x012d, size 84992 sig 0x00050656, pfmask 0xbf, 2019-09-05, rev 0x400002c, size 51200 sig 0x00060663, pfmask 0x80, 2018-04-17, rev 0x002a, size 87040 sig 0x000706a8, pfmask 0x01, 2019-08-29, rev 0x0016, size 74752 sig 0x000706e5, pfmask 0x80, 2019-09-05, rev 0x0046, size 102400 sig 0x000a0660, pfmask 0x80, 2019-08-27, rev 0x00c6, size 91136 + Updated Microcodes: sig 0x000406e3, pfmask 0xc0, 2019-08- 14, rev 0x00d4, size 101376 sig 0x00050654, pfmask 0xb7, 2019-09-05, rev 0x2000065, size 34816 sig 0x00050657, pfmask 0xbf, 2019-09-05, rev 0x500002c, size 51200 sig 0x000506e3, pfmask 0x36, 2019-08 -14, rev 0x00d4, size 101376 sig 0x000706a1, pfmask 0x01, 2019-08-28, rev 0x0032, size 73728 sig 0x000806e9, pfmask 0x10, 2019-08-14, rev 0x00c6, size 99328 sig 0x000806e9, pfmask 0xc0, 2019- 08 -14, rev 0x00c6, size 100352 sig 0x000806ea, pfmask 0xc0, 2019-08-14, rev 0x00c6, size 99328 sig 0x000806eb, pfmask 0xd0, 2019-08-14, rev 0x00c6, size 100352 sig 0x000806ec, pfmask 0x94, 2019- 08-14, rev 0x00c6, size 100352 sig 0x000906e9, pfmask 0x2a, 2019-08-14, rev 0x00c6, size 100352 sig 0x000906ea, pfmask 0x22, 2019-08-14, rev 0x00c6, size 99328 sig 0x000906eb, pfmask 0x02, 2019 -08-14, rev 0x00c6, size 100352 sig 0x000906ed, pfmask 0x22, 2019-08-14, rev 0x00c6, size 99328 + Updated Microcodes (previously removed): sig 0x00050653, pfmask 0x97, 2019-09-09, rev 0x1000151, size 32768 - Henrique de Moraes Holschuh <[email protected]> Tue, 12 Nov 2019 23:21:54 -0300

Can someone tell me or give me guidance of how to add microcode file(.bin) to microcode.dat(database) thanks

http://wp.xin.at/archives/tag/intel-microcode-dat-converter

Nothing new for Windows 10 build 19025.

another update for microcode:
== 3.20191113.1 ==
* New upstream microcode datafile 20191113 + SECURITY UPDATE, refer to the 3.20191112.1 changelog entry for details Adds microcode update for CFL-S (Coffe Lake Desktop) INTEL-SA-00270, CVE-2019-11135, CVE-2019-0117 + Updated Microcodes (previously removed): sig 0x000906ec, pf_mask 0x22, 2019-08-14, rev 0x00c6, size 99328 — Henrique de Moraes Holschuh <[email protected]> Fri, 15 Nov 2019 00:43:54 -0300

cpu406E3_platC0_ver000000D6_2019-10-03_PRD_3D233333 (>cpu406E3_platC0_ver000000D4_2019-08-14_PRD_BD56B796)
cpu506E3_plat36_ver000000D6_2019-10-03_PRD_152B6526 (>cpu506E3_plat36_ver000000D4_2019-08-14_PRD_1BCBD45F)
cpu806E9_plat10_ver000000CA_2019-10-15_PRD_0845AC10 (>cpu806E9_plat10_ver000000C8_2019-10-03_PRD_27A41211)
cpu806E9_platC0_ver000000CA_2019-09-26_PRD_78D29498 (>cpu806E9_platC0_ver000000C6_2019-08-14_PRD_98458A98)
cpu806EA_platC0_ver000000CA_2019-10-03_PRD_B1048E10 (>cpu806EA_platC0_ver000000C6_2019-08-14_PRD_DBBB8DB0)
cpu806EB_platD0_ver000000CA_2019-10-03_PRD_C2B95181 (>cpu806EB_platD0_ver000000C6_2019-08-14_PRD_615B03A6)
cpu806EC_plat94_ver000000CA_2019-10-03_PRD_3C7347B2 (>cpu806EC_plat94_ver000000C6_2019-08-14_PRD_F8A49D59)
cpu906E9_plat2A_ver000000CA_2019-10-03_PRD_2F24390B (>cpu906E9_plat2A_ver000000C6_2019-08-14_PRD_E91B42FC)
cpu906EA_plat22_ver000000CA_2019-10-03_PRD_7BC0FAE1 (>cpu906EA_plat22_ver000000C6_2019-08-14_PRD_C34D9A63)
cpu906EB_plat02_ver000000CA_2019-10-03_PRD_298BE2D2 (>cpu906EB_plat02_ver000000C6_2019-08-14_PRD_7C30A4E1)
cpu906EC_plat22_ver000000CA_2019-10-03_PRD_C2FCDC8A (>cpu906EC_plat22_ver000000C6_2019-08-14_PRD_177C8996)
cpu906ED_plat22_ver000000CA_2019-10-03_PRD_2DCD81FE (>cpu906ED_plat22_ver000000C6_2019-08-14_PRD_FB15B2A4)
cpuA0660_plat80_ver000000CA_2019-10-03_PRD_EF2CAC0C (>cpuA0660_plat80_ver000000C6_2019-08-27_PRD_BF94E0B9)

Edit: Plus all items since DB r130.

From #322
cpu406D8_plat01_ver0000012D_2019-09-16_PRD_12D03BC2 (>cpu406D8_plat01_ver0000012A_2018-01-04_PRD_7CACB989)
cpu50653_plat97_ver01000151_2019-09-09_PRD_F625EE88 (>cpu50653_plat97_ver01000146_2018-08-24_PRD_9F52DEC6)
cpu706E5_plat80_ver00000046_2019-09-05_PRD_06B0C922 (<cpu706E5_plat80_ver00000050_2019-10-27_PRD_A2FFC288)

From #318
cpu906ED_plat22_ver000000BA_2019-04-30_PRD_9E96EE89 (<cpu906ED_plat22_ver000000C6_2019-08-14_PRD_FB15B2A4)

From #309
cpu706E5_plat80_ver0000004A_2019-09-19_PRD_96938790 (<cpu706E5_plat80_ver00000050_2019-10-27_PRD_A2FFC288)

mc.rar (1.2 MB)

Intel released “microcode-20191115” today, and a brief inspection seems to indicate that it has a “CA” version microcode for “cpu806EC_plat94” that you don’t have yet.
You might want to take a look, if applicable, to add the newer microcodes if desired.
https://github.com/intel/Intel-Linux-Pro…-Files/releases

Should have refreshed first.

Hello everyone, How can I download the binary of 00040661_00000032_0000000F_20130821 ?

cpu40661_plat32_ver0000000F_2013-08-21_PRD_CC7CD277.rar (23.2 KB)

Nothing new in 19028.

Nothing new in 19030.

Intel will offer new microcode on December for “ Machine Check Error Avoidance on Page Size Change “ AKA “ MCEAPSC “ for Intel based Nahalem to Whiskey Lake and Cascade Lake Microarchitect on late December 2019. For more info.

https://software.intel.com/security-soft…age-size-change

Only Atom and Sunny Cove based Microarchitect survived. Either all affected. The MCEAPSC mitigation required both OS kernel and new Microcode deployed.

Microsoft will resolve its W10 19030 Release Candidate kernel once soon.

Nothing new in Insider 19033…

cpu50657_platBF_ver0500012C_2019-11-24_PRD_5D145F8A (>cpu50657_platBF_ver0500002C_2019-09-05_PRD_5DD63003)

cpu50657_platBF_ver0500012C_2019-11-24_PRD_5D145F8A.rar (49.5 KB)